參數(shù)資料
型號： SA7026
廠商： NXP Semiconductors N.V.
英文描述： 1.3GHz low voltage fractional-N dual frequency synthesizer
中文描述： 1.3GHz的低電壓小數(shù)N頻率合成器雙
文件頁數(shù)： 12/18頁
文件大?。?/td> 299K
代理商： SA7026
Philips Semiconductors
Product specification
SA7026
1.3GHz low voltage fractional-N dual synthesizer
1999 Nov 04
12
Data format
Table 1. Format of programmed data
Last In
MSB
Serial Programming Format
First In LSB
p23
p22
p21
p20
../..
../..
p1
p0
Table 2. A word, length 24 bits
Last In
MSB
LSB
First In
Address
fmod
Fractional-N
Main Divider ratio
Spare
0
0
FM
NF2
NF1
NF0
N15
N14
N13
N12
N11
N10
N9
N8
N7
N6
N5
N4
N3
N2
N1
N0
SK1
SK2
Default
0
0
1
0
0
0
1
0
0
0
1
0
0
0
1
1
0
0
0
0
0
0
A word select
Fixed to 00.
Fractional Modulus select
FM 0 = modulo 8, 1 = modulo 5.
Fractional-N Increment
NF2..0 Fractional N Increment values 000 to 111.
N-Divider
N0..N15, Main divider values 512 to 65535 allowed for divider ratio.
Table 3. B word, length 24 bits
Address
Reference Divider
Lock
PD
Fractional Compensation DAC
0
1
R9
R8
R7
R6
R5
R4
R3
R2
R1
R0
L1
L0
Main
Aux
FC7
FC6
FC5
FC4
FC3
FC2
FC1
FC0
Default
0
0
0
1
0
1
0
0
0
1
0
0
1
1
0
1
0
1
0
0
0
0
B word select
Fixed to 01
R-Divider
R0..R9, Reference divider values 4 to 1023 allowed for divider ration.
Lock detect output
L1 L0
0 0
0 1
1 0
1 1
When auxiliary loop and main loop are in power down mode, the lock indicator is low.
Combined main, aux. lock detect signal present at the LOCK pin (push/pull).
Combined main, aux, lock detect signal present at the LOCK pin (open drain).
Main lock detect signal present at the LOCK pin (push/pull).
Auxiliary loop lock detect signal present at the LOCK pin (push/pull).
Power down
Main = 1: power to N-divider, reference divider, main charge pumps, Main = 0 to power down.
Aux = 1: power to Aux divider, reference divider, aux charge pump, Aux = 0 to power down.
Fractional Compensation
FC7..0 Fractional Compensation charge pump current DAC, values 0 to 255.
Table 4. C word, length 24 bits
Address
Auxiliary Divider
CP
SM
SA
1
0
A13
A12
A11
A10
A9
A8
A7
A6
A5
A4
A3
A2
A1
A0
CP1
CP0
SM2
SM1
SM0
SA2
SA1
SA0
Default
0
0
0
0
0
1
1
1
0
0
1
0
1
0
1
1
0
0
0
0
0
0
C word select
Fixed to 10
A-Divider
A0..A13, Auxiliary divider values 128 to 16383 allowed for divider ratio.
Charge pump current Ratio
CP1, CP0: Charge pump current ratio, see table of charge pump currents.
Main comparison select
SM
comparison divider select for main phase detector.
Aux comparison select
SA
Comparison divider select for auxiliary phase detector.
Table 5. D word, length 24 bits
Address
Synthesizer Test Bits
Synthesizer Test Bits
1
1
0
–
–
–
–
–
Tspu
–
–
–
–
–
–
–
–
–
–
–
–
–
–
–
Default
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Tspu: Speed up = 1
Forces the main charge pumps in speed-up mode all the time.
NOTE
: All test bits must be set to 0 for normal operation.
相關(guān)PDF資料
PDF描述
SA7026DH 1.3GHz low voltage fractional-N dual frequency synthesizer
SA702 Divide by: 64/65/72 triple modulus low power ECL prescaler
SA702D Divide by: 64/65/72 triple modulus low power ECL prescaler
SA702N Divide by: 64/65/72 triple modulus low power ECL prescaler
SA702 SILICON GATE ENHANCEMENT MODE RF POWER VDMOS TRANSISTOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SA7026DH 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:1.3GHz low voltage fractional-N dual frequency synthesizer
SA702D 制造商:NXP Semiconductors 功能描述: 制造商: 功能描述: 制造商:undefined 功能描述:
SA702N 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Divide by: 64/65/72 triple modulus low power ECL prescaler
SA703 制造商:Datak Corporation 功能描述:Precision ScrewDriver Set
SA-7030A 功能描述:BCD 10-POSITION SMD J-HOOK RoHS:是 類別:開關(guān) >> DIP 系列:SA-7000 特色產(chǎn)品:RDM Series Rotary DIP Switch 標準包裝:70 系列:RDM 電路:十六進制 位置數(shù):16 觸點額定電壓:0.1A @ 42VDC 觸動器類型:用于工具旋轉(zhuǎn) 觸動器電平:凹槽式 安裝類型:通孔 方向:頂部觸動 可清洗:是 其它名稱:EG4977-5RDMAR16PIT
發(fā)布緊急采購，3分鐘左右您將得到回復。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*