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型號(hào)：	S83C154DXXX-30D
廠商：	TEMIC SEMICONDUCTORS
元件分類：	微控制器/微處理器
英文描述：	8-BIT, MROM, 30 MHz, MICROCONTROLLER, PQCC44
文件頁(yè)數(shù)：	445/1021頁(yè)
文件大小：	15196K
代理商：	S83C154DXXX-30D

32072H–AVR32–10/2012

AT32UC3A3

Mask ready flag

Due to synchronization in the clock generator, there is a slight delay from a mask register is writ-

ten until the new mask setting goes into effect. When clearing mask bits, this delay can usually

be ignored. However, when setting mask bits, the registers in the corresponding module must

not be written until the clock has actually be re-enabled. The status flag MSKRDY in ISR pro-

vides the required mask status information. When writing either mask register with any value,

this bit is cleared. The bit is set when the clocks have been enabled and disabled according to

the new mask setting. Optionally, the Power Manager interrupt can be enabled by writing the

MSKRDY bit in IER.

Sleep Modes

In normal operation, all clock domains are active, allowing software execution and peripheral

operation. When the CPU is idle, it is possible to switch off the CPU clock and optionally other

clock domains to save power. This is activated by the sleep instruction, which takes the sleep

mode index number as argument.

Entering and exiting sleep modes

The sleep instruction will halt the CPU and all modules belonging to the stopped clock domains.

The modules will be halted regardless of the bit settings of the mask registers.

Oscillators and PLLs can also be switched off to save power. Some of these modules have a rel-

atively long start-up time, and are only switched off when very low power consumption is

The CPU and affected modules are restarted when the sleep mode is exited. This occurs when

an interrupt triggers. Note that even if an interrupt is enabled in sleep mode, it may not trigger if

the source module is not clocked.

Supported sleep modes

The following sleep modes are supported. These are detailed in Table 7-1 on page 49.

Idle: The CPU is stopped, the rest of the chip is operating. Wake-up sources are any

Frozen: The CPU and HSB modules are stopped, peripherals are operating. Wake-up

sources are any interrupt from PB modules.

Standby: All synchronous clocks are stopped, but oscillators and PLLs are running, allowing

quick wake-up to normal mode. Wake-up sources are RTC or external interrupt.

Stop: As Standby, but Oscillator 0 and 1, and the PLLs are stopped. 32 KHz (if enabled) and

RC oscillators and RTC/WDT still operate. Wake-up sources are RTC, external interrupt, or

external reset pin.

DeepStop: All synchronous clocks, Oscillator 0 and 1 and PLL 0 and 1 are stopped. 32 KHz

oscillator can run if enabled. RC oscillator still operates. Bandgap voltage reference, BOD

and BOD33 are turned off. Wake-up sources are RTC, external interrupt (EIC) or external

Static: All oscillators, including 32 KHz and RC oscillator are stopped. Bandgap voltage

reference, BOD and BOD33 detectors are turned off. Wake-up sources are external interrupt

(EIC) in asynchronous mode only or external reset pin.

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相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
S83C154-L16	制造商:未知廠家制造商全稱:未知廠家功能描述:8-Bit Microcontroller
S83C154T-12	制造商:未知廠家制造商全稱:未知廠家功能描述:8-Bit Microcontroller
S83C154T-16	制造商:未知廠家制造商全稱:未知廠家功能描述:8-Bit Microcontroller
S83C154T-20	制造商:未知廠家制造商全稱:未知廠家功能描述:8-Bit Microcontroller
S83C154T-25	制造商:未知廠家制造商全稱:未知廠家功能描述:8-Bit Microcontroller

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