465
32072H–AVR32–10/2012
AT32UC3A3
22.9.7
Status Register
Name:
SR
Access Type:
Read-only
Offset:0x18
Reset Value:
0x000000002
BTF: Byte Transfer Finished
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when byte transfer has completed.
REP: Repeated Start Received
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when a REPEATED START condition is received.
STO: Stop Received
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the STOP condition is received.
SMBDAM: SMBus Default Address Match
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the received address matched the SMBus Default Address.
SMBHHM: SMBus Host Header Address Match
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the received address matched the SMBus Host Header Address.
SMBALERTM: SMBus Alert Response Address Match
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the received address matched the SMBus Alert Response Address.
GCM: General Call Match
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the received address matched the General Call Address.
SAM: Slave Address Match
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the received address matched the Slave Address.
BUSERR: Bus Error
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when a misplaced START or STOP condition has occurred.
31
30
29
28
27
26
25
24
--
-
-----
23
22
21
20
19
18
17
16
BTF
REP
STO
SMBDAM
SMBHHM
SMBALERTM
GCM
SAM
15
14
13
12
11
10
9
8
-
BUSERR
SMBPECERR
SMBTOUT
-
NAK
76
5
4
3210
ORUN
URUN
TRA
-
TCOMP
SEN
TXRDY
RXRDY