參數(shù)資料
型號: S71WS512NE0BFWZZ2
廠商: SPANSION LLC
元件分類: 存儲器
英文描述: Stacked Multi-Chip Product (MCP) Flash Memory and pSRAM CMOS 1.8 Volt
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA96
封裝: 9 X 12 MM, LEAD FREE, FBGA-96
文件頁數(shù): 101/142頁
文件大?。?/td> 1996K
代理商: S71WS512NE0BFWZZ2
June 28, 2004 S71WS512NE0BFWZZ_00_A1
128Mb pSRAM
101
P r e l i m i n a r y
FUNCTIONAL DESCRIPTION (Continued)
Burst Read/Write Operation
Synchronous burst read/write operation provides faster memory access that
synchronized to microcontroller or system bus frequency. Configuration Register
Set is required to perform burst read & write operation after power-up. Once CR
Set sequence is performed to select synchronous burst mode, the device is
configured to synchronous burst read/write operation mode with corresponding
RL and BL that is set through CR Set sequence together with operation mode. In
order to perform synchronous burst read & write operation, it is required to control
new signals, CLK, ADV# and WAIT# that Low Power SRAMs don’t have.
ADDRESS
ADV#
CLK
DQ
Valid
CE#1
OE#
WAIT#
High-Z
High-Z
RL
BL
Q
2
Q
BL
Q
1
WE#
High
ADDRESS
ADV#
CLK
DQ
Valid
CE#1
OE#
WAIT#
High-Z
High-Z
RL-1
BL
D
2
D
BL
D
1
WE#
High
Burst Read Operation
Burst Write Operation
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