參數(shù)資料
型號(hào)： S524LB0XB1
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 32K/64K-bit Serial EEPROM
中文描述： 32K/64K-bit串行EEPROM
文件頁(yè)數(shù)： 7/20頁(yè)
文件大?。?/td> 145K
代理商： S524LB0XB1
DATA SHEET
S524LB0D91/B0DB1 SERIAL EEPROM
7-7
Master
SCL Line
Data from
Transmitter
ACK
ACK from
Receiver
Bit 9
Bit 1
Figure 7-8. Acknowledge Response From Receiver
Slave Address: After the master initiates a start condition, it must output the address of the device to be
accessed. The most significant four bits of the slave address are called the “device identifier.” The identifier
for the S524LB0D91/B0DB1 is “1010B”. The next three bits comprise the address of a specific device. The
device address is defined by the state of the A0, A1, and A2 pins. Using this addressing scheme, you can
cascade up to eight S524LB0D91/B0DB1s on the bus (see Figure 7-9 below).
Read/Write: The final (eighth) bit of the slave address defines the type of operation to be performed. If the
R
/
W
bit is “1”, a read operation is executed. If it is “0”, a write operation is executed.
Slave
Address
1
0
1
0
A2
A1
A0
R/W
Device Identifier
Device Select
First Word
Address
Second Word
Address
X
X
X
(2)
A12
(1)
A11
A10
A9
A8
First (High) Address
A7
A6
A5
A4
A3
A2
A1
A0
Second (Low) Address
NOTES:
1. The A12 is "don't care" for the S524LB0X91.
2. X = Don't care.
Figure 7-9. Device Address
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