參數(shù)資料
型號(hào)： S524LB0XB1
廠商： SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述： 32K/64K-bit Serial EEPROM
中文描述： 32K/64K-bit串行EEPROM
文件頁(yè)數(shù)： 15/20頁(yè)
文件大?。?/td> 145K
代理商： S524LB0XB1
DATA SHEET
S524LB0D91/B0DB1 SERIAL EEPROM
7-15
Table 7-3. D.C. Electrical Characteristics (Continued)
(T
A
= – 25
°
C to + 70
°
C (Commercial), – 40
°
C
to + 85
°
C (Industrial), V
CC
= 2.0 V to 5.5 V)
Parameter
Symbol
Input capacitance
C
IN
25
°
C, 1MHz,
V
CC
= 5 V, V
IN
= 0 V,
A0, A1, A2, SCL and WP pin
Input/Output capacitance
C
I/O
25
°
C, 1MHz,
V
CC
= 5 V, V
I/O
= 0 V,
SDA pin
Conditions
Min
–
Typ
–
Max
10
Unit
pF
–
–
10
Table 7-4. A.C. Electrical Characteristics
(T
A
= – 25
°
C to + 70
°
C (Commercial), – 40
°
C
to + 85
°
C (Industrial), V
CC
= 2.0 V to 5.5 V)
Parameter
Symbol
Conditions
V
CC
= 2.0 to 5.5 V
(Standard Mode)
Min
V
CC
= 4.5 to 5.5 V
(Fast Mode)
Min
Unit
Max
100
(1)
Max
400
(1)
External clock frequency
F
clk
t
HIGH
t
LOW
t
R
t
F
t
HD:STA
t
SU:STA
t
HD:DAT
t
SU:DAT
t
SU:STO
t
BUF
–
0
0
kHz
Clock High time
–
4
–
0.6
–
μ
s
Clock Low time
–
4.7
–
1.3
–
μ
s
Rising time
SDA, SCL
–
1
–
0.3
μ
s
Falling time
SDA, SCL
–
0.3
–
0.3
μ
s
Start condition hold time
–
4
–
0.6
–
μ
s
Start condition setup time
–
4.7
–
0.6
–
μ
s
Data input hold time
–
0
–
0
–
μ
s
Data input setup time
–
0.25
–
0.1
–
μ
s
Stop condition setup time
–
4
–
0.6
–
μ
s
Bus free time
Before new
transmission
–
4.7
–
1.3
–
μ
s
Data output valid from
clock low
(2)
Noise spike width
t
AA
0.3
3.5
–
0.9
μ
s
t
SP
t
WR
–
–
100
–
50
ns
Write cycle time
–
–
5
–
5
ms
NOTES
:
1. Upon customers request, up to 400 kHz (Max.) in standard mode and 1 MHz in fast mode are available.
2. When acting as a transmitter, the S524LB0D91/B0DB1 must provide an internal minimum delay time to bridge the
undefined period (minimum 300 ns) of the falling edge of SCL. This is required to avoid unintended generation of a start
or stop condition.
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