
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
Page 6
S4406
AC SPECIFICATIONS
ABSOLUTE MAXIMUM RATINGS
TTL Supply Voltage VCC (VEE = 0)
TTL Input Voltage (VEE = 0)
Operating Temperature
Operating Junction Temperature TJ
Storage Temperature
7.0 V
5.5 V
0
°
C to 70
°
C ambient
+ 130
°
C
–65
°
C to +150
°
C
Parameter
Min
Nom
Max
Units
TTL Supply Voltage (VCC)
Operating Temperature
4.75
0
5.0
—
5.25
70
V
°
C
(ambient)
—
(ambient)
130
Junction Temperature
—
°
C
RECOMMENDED OPERATING CONDITIONS
Table 3. AC Specifications
Symbol
Description
Min
Max
Units
f
VCO
f
REF
t
IRF
MPW
REF
t
PE
t
PED
t
SKEW
t
SKEWA
t
DC
f
FOUT
t
PS
t
j
t
ORF
t
LOCK
t
PSV
VCO Frequency
REFCLK Frequency
Input Rise/Fall Time
REFCLK Minimum Pulse Width
Phase Error between REFCLK and FBCLK
Phase Error Difference from Part to Part
1
Output Skew
2
across all outputs
Output Skew
2
within any bank
Output Duty Cycle
3
FOUT Frequency
4
Nominal Phase Shift Increment
5
Clock Stability
6
FOUT Rise/Fall Time
7
Loop Acquisition Time
8
Phase Shift Variation
5
160
10
1
5.0
-1.0
0
0
0
45
10
3.75
266
66
3
MHz
MHz
ns
ns
ns
ps
ps
ps
%
MHz
ns
ps
ns
ms
ps
0
750
500
250
55
66
6.25
500
1.5
5
+250
0.5
-250
1. Difference in phase error between two parts at the same voltage, temperature and frequency.
2. Output skew guaranteed for equal loading at each output.
3. Outputs loaded with 35 pF, measured at 1.5 V.
4. C
= 35 pF.
5. All phase shift increments and variation are measured relative to 0FOUT0 at 1.5 V.
6. Clock period jitter with all FOUT outputs operating at 66MHz loaded with 25 pF using loop filter
shown. Parameter guaranteed, but not tested.
7. With 35 pF output loading (0.8 V to 2.0 V transition).
8. Depends on loop filter chosen. (Number given is for example filter.)
REFCLK
REF
MPW
FBCLK
XFOUT0–2
REF
MPW
t
SKEW
t
SKEW
t
PE
0FOUT0–2
t
SKEWA
Figure 7. Timing Waveforms