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參數(shù)資料
| 型號： | S3019 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | SONET/SDH/ATM OC-3/12 Transceiver W/CDR(SONET/SDH/ATM收發(fā)器(完全集成OC-3/12接口器件)) |
| 中文描述： | TRANSCEIVER, PQFP80 |
| 封裝： | 14 X 14 MM, PLASTIC, QFP-80 |
| 文件頁數(shù)： | 3/22頁 |
| 文件大?。?/td> | 437K |
| 代理商： | S3019 |
3
S3019
SONET/SDH/ATM OC-3/12 TRANSCEIVER W/CDR
March 2, 2001 / Revision G
S3019 OVERVIEW
The S3019 transceiver implements SONET/SDH se-
rialization/deserialization, transmission, and frame
detection/recovery functions. The block diagram in
Figure 4 shows the basic operation of the chip. This
chip can be used to implement the front end of
SONET equipment, which consists primarily of the
serial transmit interface and the serial receive inter-
face. The chip handles all the functions of these two
elements, including parallel-to-serial and serial-to-par-
allel conversion, clock generation and recovery, and
system timing. The system timing circuitry consists
of management of the data stream, framing, and
clock distribution throughout the front end.
The S3019 is divided into a transmitter section and a
receiver section. The sequence of operations is as
follows:
Transmitter Operations:
1. 8-bit parallel input
2. Parallel-to-serial conversion
3. Serial output
AMCC CONGO (S1201) POS/ATM SONET Mapper
AMCC NILE (S1202) ATM SONET Mapper
Table 2. Suggested Interface Devices
Receiver Operations:
1. Clock and data recovery from serial input
2. Frame detection
3. Serial-to-parallel conversion
4. 8-bit parallel output
Internal clocking and control functions are transpar-
ent to the user.
A lock detect feature is provided on the S3019,
which indicates that the PLL is locked (synchronized)
to the incoming data stream, and facilitates continu-
ous down-stream clocking in the absence of data.
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