參數(shù)資料
型號(hào)： S29NS128J0PBFW002
廠商： SPANSION LLC
元件分類： PROM
英文描述： 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
中文描述： 8M X 16 FLASH 1.8V PROM, 65 ns, PBGA48
封裝： 10 X 11 MM, LEAD FREE, FBGA-48
文件頁(yè)數(shù)： 48/85頁(yè)
文件大小： 799K
代理商： S29NS128J0PBFW002
44
S29NS-J
S29NS-J_00_A10 March 22, 2006
D a t a S h e e t
Table 18. Command Definitions
Command Sequence
(Notes)
C
Bus Cycles (Notes
1
–
6
)
First
Second
Third
Fourth
Fifth
Sixth
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Asynchronous Read (
7
)
1
RA
RD
Reset (
8
)
1
XXX
F0
A
9
)
Manufacturer ID
4
555
AA
2AA
55
(BA)555
90
(BA)X00
0001
Device ID
6
555
AA
2AA
55
(BA)555
90
(BA)X01
(
10
)
(BA)X0E
(
11
)
(BA) X0F
(
12
)
Sector Lock Verify (
13
)
4
555
AA
2AA
55
(SA)555
90
(SA)X02
(
13
)
Revision ID (
14
)
4
555
AA
2AA
55
(BA)555
90
(BA)X03
(
14
)
U
Mode Entry
3
555
AA
2AA
55
555
20
Program (
15
)
2
XXX
A0
PA
PD
Reset (
16
)
2
BA
90
XXX
00
Program
4
555
AA
2AA
55
555
A0
PA
PD
Chip Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
555
10
Sector Erase
6
555
AA
2AA
55
555
80
555
AA
2AA
55
SA
30
Erase Suspend (
17
)
1
BA
B0
Erase Resume (
18
)
1
BA
30
Sector Lock/Unlock
3
XXX
60
XXX
60
SLA
60
Set Config. Register (
19
)
3
555
AA
2AA
55
(CR)555
C0
CFI Query (
20
)
1
55
98
Legend:
X = Don’t care
RA = Address of the memory location to be read.
RD = Data read from location RA during read operation.
PA = Address of the memory location to be programmed. Addresses
latch on the falling edge of the WE# or CE# pulse, whichever happens
later.
PD = Data to be programmed at location PA. Data latches on the rising
edge of WE# or CE# pulse, whichever happens first.
SA = Address of the sector to be verified (in autoselect mode) or
erased. Address bits A
max
–A13 uniquely select any sector.
BA = Address of the bank (A22–A21 for S29NS128J, A21–A20 for
S29NS064J, A20–A19 for S29NS032J, A19–A18 for S29NS016J) that
is being switched to autoselect mode, is in bypass mode, or is being
erased.
SLA = Address of the sector to be locked. Set sector address (SA) and
either A6 = 1 for unlocked or A6 = 0 for locked.
CR = Configuration Register set by address bits A17–A12.
Notes:
1.
2.
3.
See
Table 1
for description of bus operations.
All values are in hexadecimal.
Except for the read cycle and the fourth cycle of the autoselect
command sequence, all bus cycles are write cycles.
Data bits DQ15–DQ8 are don’t care in command sequences,
except for RD and PD.
Unless otherwise noted, address bits A
max
–A12 are don’t cares.
Writing incorrect address and data values or writing them in the
improper sequence may place the device in an unknown state.
The system must write the reset command to return the device
to reading array data.
No unlock or command cycles required when bank is reading
array data.
The Reset command is required to return to reading array data
(or to the erase-suspend-read mode if previously in Erase
Suspend) when a bank is in the autoselect mode, or if DQ5 goes
high (while the bank is providing status information).
The fourth cycle of the autoselect command sequence is a read
cycle. The system must read device IDs across the 4th, 5th, and
6th cycles, The system must provide the bank address. See the
Autoselect Command Sequence
section for more information.
10. For S29NS128J, the data is 007Eh. For S29NS064J, the data is
277Eh. For S29NS032J, the data is 2A7Eh. For S29NS016J, the
data is 297Eh.
4.
5.
6.
7.
8.
9.
11. For S29NS128J, the data is 0016h. For S29NS064J, the data is
2702h, for S29NS032J, the data is 2A24h, for S29NS016J, the
data is 2915h.
12. For S29NS128J, the data is 0000h, for S29NS064J, the data is
2700h, for S29NS032J, the data is 2A00h for S29NS016J, the
data is 2900h.
13. The data is 0000h for an unlocked sector and 0001h for a locked
sector.
14. The data is TBD, based on Nokia spec.
15. The Unlock Bypass command sequence is required prior to this
command sequence.
16. The Unlock Bypass Reset command is required to return to
reading array data when the bank is in the unlock bypass mode.
17. The system may read and program in non-erasing sectors, or
enter the autoselect mode, when in the Erase Suspend mode.
The Erase Suspend command is valid only during a sector erase
operation, and requires the bank address.
18. The Erase Resume command is valid only during the Erase
Suspend mode, and requires the bank address.
19. The addresses in the third cycle must contain, on A17–A12, the
additional wait counts to be set. See
“Set Configuration Register
Command Sequence”
.
20. Command is valid when device is ready to read array data or
when device is in autoselect mode.
相關(guān)PDF資料
PDF描述
S29NS128J0PBFW003 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS128J0PBJW00 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS128J0PBJW000 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS128J0PBJW002 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS128J0PBJW003 110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29NS128J0PBFW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS128J0PBJW00 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS128J0PBJW000 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS128J0PBJW002 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
S29NS128J0PBJW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:110 nm CMOS 1.8-Volt only Simultaneous Read/Write, Burst Mode Flash Memories
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*