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參數(shù)資料
| 型號： | S29NS064N0PBJW000 |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| 中文描述： | 4M X 16 FLASH 1.8V PROM, 80 ns, PBGA44 |
| 封裝： | 7.70 X 6.20 MM, LEAD FREE, FBGA-44 |
| 文件頁數(shù)： | 26/86頁 |
| 文件大?。?/td> | 1036K |
| 代理商： | S29NS064N0PBJW000 |
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24
S29NS-N MirrorBit Flash Family
S29NS-N_00_A12 June 13, 2006
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
8.20
Hardware Data Protection Mode
The device offers two types of data protection at the sector level:
1. When WP# is at V
IL
, the two outermost sectors at the top are locked (device specific).
1. When ACC is at V
IL
, all sectors are locked.
SA257 and SA258 are locked (S29NS256N)
SA129 and SA130 are locked (S29NS128N)
SA129 and SA130 are locked (S29NS064N)
The write protect pin (WP#) adds a final level of hardware program and erase protection to the boot sectors.
The boot sectors are the two sectors containing the highest set of addresses in these top-boot-configured
devices. For the none boot option, the WP# hardware feature is not available.
When this pin is low it is not
possible to change the contents of these top sectors.
These sectors generally hold system boot code.
So, the WP# pin can prevent any changes to the boot code that could override the choices made while setting
up sector protection during system initialization.
The following hardware data protection measures prevent accidental erasure or programming, which might
otherwise be caused by spurious system level signals during V
CC
power-up and power-down transitions, or
from system noise.
8.20.1
Write Protect (WP#)
The Write Protect feature provides a hardware method of protecting the two outermost sectors. This function
is provided by the WP# pin and overrides the previously discussed Sector Protection/Unprotection method.
If the system asserts V
IL
on the WP# pin, the device disables program and erase functions in the “top” boot
sectors. If the system asserts V
IH
on the WP# pin, the device reverts to whether the boot sectors were last set
to be protected or unprotected. That is, sector protection or unprotection for these sectors depends on
whether they were last protected or unprotected.
8.21
WP# Boot Sector Protection
The WP# signal will be latched at a specific time in the embedded program or erase sequence. To prevent a
write to the top two sectors, WP# must be asserted (WP#=V
IL
) on the last write cycle of the embedded
sequence (i.e., 4th write cycle in embedded program, 6th write cycle in embedded erase).
If selecting multiple sectors for erasure: The WP# protection status is latched only on the 6th write cycle of the
embedded sector erase command sequence when the first sector is selected. If additional sectors are
selected for erasure, they are subject to the WP# status that was latched on the 6th write cycle of the
command sequence.
Note that the WP# pin must not be left floating or unconnected; inconsistent behavior of the device may
result.
8.22
Low VCC Write Inhibit
When V
CC
is less than V
LKO
, the device does not accept any write cycles. This protects data during V
CC
power-up and power-down. The command register and all internal program/erase circuits are disabled, and
the device resets to reading array data. Subsequent writes are ignored until V
CC
is greater than V
LKO
. The
system must provide the proper signals to the control inputs to prevent unintentional writes when VCC is
greater than VLKO.
8.23
Write Pulse “Glitch” Protection
Noise pulses of less than t
WEP
on WE# do not initiate a write cycle.
8.24
Logical Inhibit
Write cycles are inhibited by holding any one of OE# = V
IL
, CE# = V
IH
or WE# = V
IH
. To initiate a write cycle,
CE# and WE# must be a logical zero while OE# is a logical one.
相關(guān)PDF資料 |
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| S29NS064N0PBJW002 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0PBJW003 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0SBJW000 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0SBJW002 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0SBJW003 | Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29NS064N0PBJW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0PBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0SBJW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0SBJW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS064N0SBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
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