參數(shù)資料
型號: S29CD016G0MFAN010
廠商: SPANSION LLC
元件分類: PROM
英文描述: 16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
中文描述: 512K X 32 FLASH 2.7V PROM, 64 ns, PBGA80
封裝: 13 X 11 MM, 1 MM PITCH, FORTIFIED, BGA-80
文件頁數(shù): 68/81頁
文件大小: 1276K
代理商: S29CD016G0MFAN010
68
S29CD-G Flash Family
S29CD-G_00_B1 March 3, 2009
Data
Sheet
(Pre limin ar y)
24.5
Erase/Program Operations
Notes
1. Not 100% tested.
2. See Command Definitions on page 40 for more information.
Note
PA = program address, PD = program data, DOUT is the true data at the program address.
Parameter
Description
All Speed Options
Unit
JEDEC
Std.
tAVAV
tWC
Write Cycle Time (Note 1)
Min
60
ns
tAVWL
tAS
Address Setup Time
Min
0
tWLAX
tAH
Address Hold Time
Min
25
tDVWH
tDS
Data Setup to WE# Rising Edge
Min
18
tWHDX
tDH
Data Hold from WE# Rising Edge
Min
2
tGHWL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
tELWL
tCS
CE# Setup Time
Min
0
tWHEH
tCH
CE# Hold Time
Min
2
tWLWH
tWP
WE# Width
Min
25
tWHWL
tWPH
Write Pulse Width High
Min
30
tWHWH1
tWHWH1 Programming Operation (Note 2)
Double-Word
Typ
18
s
tWHWH2
tWHWH2 Sector Erase Operation (Note 2)
Typ
1.0
sec.
tVCS
VCC Setup Time (Note 1)
Min
50
s
tRB
Recovery Time from RY/BY#
Min
0
ns
tBUSY
RY/BY# Delay After WE# Rising Edge
Max
90
tWPWS
WP# Setup to WE# Rising Edge with Command
Min
20
tWPRH
WP# Hold after RY/BY# Rising Edge
Min
2
OE#
WE#
CE#
VCC
Data
Addresses
tDS
tAH
tDH
tWP
PD
tWHWH1
tWC
tAS
tWPH
tVCS
555h
PA
Read Status Data (last two cycles)
A0h
tCS
Statu
DOUT
Program Command Sequence (last two cycles)
RY/BY#
tRB
tBUSY
tCH
PA
相關PDF資料
PDF描述
S29CD032G0JFFN002 1M X 32 FLASH 2.7V PROM, 67 ns, PBGA80
S29CD032G0RFFN003 1M X 32 FLASH 2.7V PROM, 48 ns, PBGA80
S29CD032G0RQFI012 1M X 32 FLASH 2.7V PROM, 48 ns, PQFP80
S29CL032J0JFAM020 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80
S29CL032J0JFFM020 1M X 32 FLASH 3.3V PROM, 54 ns, PBGA80
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