參數(shù)資料
型號: S29CD016G0MFAN010
廠商: SPANSION LLC
元件分類: PROM
英文描述: 16 Megabit (512 K x 32-Bit) CMOS 2.5 Volt-only Burst Mode, Dual Boot, Simultaneous Read/Write Flash Memory
中文描述: 512K X 32 FLASH 2.7V PROM, 64 ns, PBGA80
封裝: 13 X 11 MM, 1 MM PITCH, FORTIFIED, BGA-80
文件頁數(shù): 53/81頁
文件大?。?/td> 1276K
代理商: S29CD016G0MFAN010
March 3, 2009 S29CD-G_00_B1
S29CD-G Flash Family
55
Da ta
Shee t
(Prelim i nar y )
Figure 16.1 Data# Polling Algorithm
Notes
1. VA = Valid address for programming. During a sector erase operation, a valid address is an address within any sector selected for
erasure. During chip erase, a valid address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = 1 because DQ7 may change simultaneously with DQ5
If RESET# is asserted during a program or erase operation, the RY/BY# pin remains a 0 (busy) until the
internal reset operation is complete, which requires a time of tREADY (during Embedded Algorithms). The
system can thus monitor RY/BY# to determine whether the reset operation is complete. If RESET# is
asserted when a program or erase operation is not executing (RY/BY# pin is floating), the reset operation is
completed in a time of tREADY (not during Embedded Algorithms). The system can read data tRH after the
RESET# pin returns to VIH.
Since the RY/BY# pin is an open-drain output, several RY/BY# pins can be tied together in parallel with a pull-
up resistor to VCC. An external pull-up resistor is required to take RY/BY# to a VIH level since the output is an
open drain.
Figure 24.8 on page 69 show RY/BY# for read, reset, program, and erase operations, respectively.
DQ7 = Data?
Yes
No
DQ5 = 1?
No
Yes
FAIL
PASS
Read DQ7–DQ0
Addr = VA
Read DQ7–DQ0
Addr = VA
DQ7 = Data?
START
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