- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374646 > S2054 (APPLIEDMICRO INC) Fibre Channel and GigaBit Ethernet Transceiver(帶雙接收和發(fā)送串行I/O的光纖通道和千兆位以太網(wǎng)收發(fā)器) PDF資料下載
參數(shù)資料
| 型號： | S2054 |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 網(wǎng)絡(luò)接口 |
| 英文描述： | Fibre Channel and GigaBit Ethernet Transceiver(帶雙接收和發(fā)送串行I/O的光纖通道和千兆位以太網(wǎng)收發(fā)器) |
| 中文描述： | DATACOM, ETHERNET TRANSCEIVER, PQFP64 |
| 封裝： | 10 X 10 MM, PLASTIC, QFP-64 |
| 文件頁數(shù)： | 12/15頁 |
| 文件大?。?/td> | 306K |
| 代理商： | S2054 |
12
FIBRE CHANNEL AND GIGABIT ETHERNET TRANSCEIVER
S2054
March 21, 2001 / Revision A
Parameters
Transmitter Output Jitter Allocation
Description
Min
Max
Units
Conditions
T
1
T
2
T
1
T
2
T
SDR ,
T
SDF
Data setup w.r.t. REFCLKP/N
Data hold w.r.t. REFCLKP/N
Data setup w.r.t. TREFCLK
Data hold w.r.t. TREFCLK
Serial data rise and fall
1.5
1.0
1.5
1.0
—
—
—
—
—
300
ns
ns
ns
ns
ps
See note.
See note.
20% to 80%, tested on a sample basis.
T
JRMS
Serial data output random
jitter (RMS)
—
20
ps
RMS, tested on a sample basis.
Measured with K28.7 pattern at
1250 Mbps.
Measured with K28.5
±
pattern at
1250 Mbps.
—
100
ps
Peak-to-peak, tested on a sample basis.
Serial data output
deterministic jitter (p-p)
T
DJ
Table 10. S2054 Transmitter Timing
Table 11. S2054 Receiver Timing
Table 9. S2054 Performance Summary
r
e
m
a
r
a
P
y
c
n
e
u
q
e
F
g
n
p
O
d
o
p
k
c
o
l
S
d
o
p
k
c
o
e
B
e
m
i
n
o
q
c
A
k
c
o
e
c
n
e
R
Parameters
Description
Min
Max
Units
Conditions
T
3
T
4
T
5
T
6
T
7
T
RCR ,
T
RCF
T
DR ,
T
DF
T
SDR ,
T
SDF
T
LOCK
Duty Cycle
Input Jitter
Tolerance
RBC0 to RBC1 skew
Data setup w.r.t. RBC0, RBC1
Data hold w.r.t. RBC0, RBC1
Data setup w.r.t. RBC0, RBC1
Data hold w.r.t. RBC0, RBC1
RBC0, RBC1 rise and fall time
Data Output rise and fall time
Serial data input rise and fall
Data acquisition lock time @
<1.0625Gb/s
RBC0/RBC1 Duty Cycle
Input data eye opening
allocation at receiver input
for BER
≤
1E–12
7.5
3.0
1.5
2.5
2.0
—
—
—
—
40%
30%
8.5
3.0
3.0
300
2.4
60%
—
ns
ns
ns
ns
ns
ns
ns
ps
μ
s
bit time
Tested on a sample basis.
1.0625 GHz Mode
1.0625 GHz Mode
1.250 GHz Mode
1.250 GHz Mode
Measured from .8V to 2.0V.
Measured from .8V to 2.0V.
20% to 80%. (See Figure 10.)
8B/10B IDLE pattern sample basis
As specified in Fibre Channel FC–PH
standard eye diagram jitter mask.
*
±
10% lock range, nominal frequency is per FC-PH standard.
Note: All AC measurements are made from the reference voltage level of the clock (1.4V) to the valid input or output data levels
(.8V or 2.0V).
4
5
0
2
S
s
U
s
M
n
n
n
H
M
*
0
0
0
0
5
0
2
1
8
0
2
2
1
1
5
6
1
4
9
4
5
2
2
0
1
0
1
s
s
s
1
0
5
0
0
5
z
h
w
d
W
0
1
s
Note: Max. Load = 15 pF. All AC measurements are made from the reference voltage level of the clock (1.4V) to the valid input or
output data levels (.8V or 2.0V).
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S2055A | SILICON DIFFUSED POWER TRANSISTOR |
| S2057 | Port Bypass Circuit for Fibre Channel and GigaBit Ethernet(用于光纖通道和千兆位以太網(wǎng)的端口旁路電路) |
| S2058 | Port Bypass and Repeater for Fibre Channel Arbitrated Loop(用于光纖通道仲裁環(huán)路的端口旁路電路和中繼器) |
| S2060 | GIGABIT ETHERNET TRANSCEIVER |
| S2060A | GIGABIT ETHERNET TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S2054AG4 | 制造商:TYAN 功能描述:M-ATX SOCKET-370 INTEL 810 - Bulk |
| S2055 | 制造商:ISC 制造商全稱:Inchange Semiconductor Company Limited 功能描述:Silicon NPN Power Transistors |
| S2055A | 制造商:SAVANTIC 制造商全稱:Savantic, Inc. 功能描述:Silicon NPN Power Transistors |
| S2055AF | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:SILICON DIFFUSED POWER TRANSISTOR |
| S2055F | 制造商:ISC 制造商全稱:Inchange Semiconductor Company Limited 功能描述:Silicon NPN Power Transistors |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。