參數(shù)資料
型號： S1R72C05B08
元件分類： 總線控制器
英文描述： UNIVERSAL SERIAL BUS CONTROLLER, PBGA121
封裝： 8 X 8 MM, 0.65 MM PITCH, PLASTIC, TFBGA-121
文件頁數(shù)： 29/49頁
文件大?。?/td> 545K
代理商： S1R72C05B08
7. ELECTRICAL CHARACTERISTICS
30
EPSON
S1R72C05*** Data Sheet (Rev.1.00)
Ultra DMA Read Timing (continued)
XHCS[1:0](O)
HDA[2:0](O)
HDMARQ(I)
XHDMACK(O)
XHIOW(O)
HDD[15:0](O)
XHIOR(O)
HIORDY(I)
T377
T371
T372
T373
T375
T376
T378
T379
CRC
Host Terminating
Device Terminating
T377
T379
T378
T374
T37a
T37b
(STOP)
(XHDMARDY)
(DSTROBE)
T374
CRC
stable
Code
Description
Min.
Typ.
Max.
Units
T371
180
-
ns
T372
-
IDE spec.
tRFS
ns
T373
-
IDE spec.
tLI
ns
T374
70
-
ns
T375
160
-
ns
T376
110
-
ns
T377
35
-
ns
T378
75
-
ns
T379
12
-
ns
T37a
20
-
38
ns
T37b
110
-
ns
(CRC)
Data transfer direction:
S1R72C05
DATA
stable
CRC
XHIOR ↑ → XHIOW ↑
Time to STOP assert
XHIOR
↑ → HIORDY
Final STROBE time
XHIOW ↑ → HDMARQ ↓
Restricted interlock time
HDMARQ
↓ → HDD
Output delay time
HDMARQ
↓ → XHDMACK ↑
Minimum interlock time
HIORDY
→ XHDMACK ↑
Minimum interlock time
XHDMACK
↑ → XHCS0, 1
XHCS0, 1 hold time
HDD(CRC)
→ XHDMACK ↑
CRC data setup time
XHDMACK
↑ → HDD(CRC)
CRC data hold time
HDMARQ ↓ → XHIOR ↑
Restricted interlock time
HIORDY
→ XHDMACK ↑
Minimum interlock time
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