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參數(shù)資料
| 型號： | S1R72C05B08 |
| 元件分類： | 總線控制器 |
| 英文描述： | UNIVERSAL SERIAL BUS CONTROLLER, PBGA121 |
| 封裝： | 8 X 8 MM, 0.65 MM PITCH, PLASTIC, TFBGA-121 |
| 文件頁數(shù)： | 15/49頁 |
| 文件大小： | 545K |
| 代理商： | S1R72C05B08 |
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7. ELECTRICAL CHARACTERISTICS
S1R72C05*** Data Sheet (Rev.1.00)
EPSON
17
7. ELECTRICAL CHARACTERISTICS
7.1 Absolute Maximum Ratings
Item
Symbol
Rating
Units
HVDD
VSS - 0.3 to 4.0
V
CVDD
VSS - 0.3 to 4.0
V
Power supply voltage
LVDD
VSS - 0.3 to 2.5
V
HVI
VSS - 0.3 to HVDD + 0.5
V
CVI*1
VSS - 0.3 to CVDD + 0.5
V
IVI*2
VSS - 0.3 to 5.5
V
VVI*3
VSS - 0.3 to 6.0
V
Input voltage
LVI*4
VSS - 0.3 to LVDD + 0.5
V
HVO
VSS - 0.3 to HVDD + 0.5
V
Output voltage
CVO*1
VSS - 0.3 to CVDD + 0.5
V
Output current/terminal
IOUT
±10
mA
Storage temperature
Tstg
-65 to 150
°C
*1 CPU-I/F
*2 IDE-I/F
*3 VBUS_B
*4 XI
7.2 Recommended Operating Conditions
Item
Symbol
Min.
Typ.
Max.
Units
HVDD
3.00
3.30
3.60
V
CVDD
1.65
-
3.60
V
Power supply voltage
LVDD
1.65
1.80
1.95
V
HVI
-0.3
-
HVDD+0.3
V
CVI*1
-0.3
-
CVDD+0.3
V
IVI*2
-0.3
-
5.5
V
VVI*3
-0.3
-
6.0
V
Input voltage
LVI*4
-0.3
-
LVDD+0.3
V
Ambient temperature
Ta
-40
25
85
°C
*1 CPU-I/F
*2 IDE-I/F
*3 VBUS_B
*4 XI
Power to the IC should be turned on in the sequence shown below.
LVDD (internal)
→ HVDD, CVDD (IO section)
Likewise, power to the IC should be turned off in the sequence shown below.
HVDD, CVDD (IO section)
→ LVDD (internal)
Note: Avoid leaving the HVDD or CVDD on continuously (for more than 1 second) when the
LVDD is off, since doing so may affect the chip reliability.
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