參數(shù)資料
型號: S1M8657
廠商: SAMSUNG SEMICONDUCTOR CO. LTD.
英文描述: TX IF/BBA WITH AGC
中文描述: 德克薩斯州中頻/工商管理帶AGC
文件頁數(shù): 17/34頁
文件大小: 281K
代理商: S1M8657
TX IF/BBA WITH AGC
S1M8657
17
Modes of Operation
S1M8657 can be controlled by parallel control mode or by SPI bus. The analog switch , an existing external
component, in the IC an be also controlled through separate specified parallel inputs or by SPI. The modes of
operation can be formed by parallel inputs such as FMB, IDLEB, and PAON, or by related SPI registers, as
shown in Table 1.
Table 1. Mode control in the parallel mode control
MODE
CDMA talk
CDMA idle
FM talk
FM idle
FMB
H
H
L
L
X
IDLEB
H
L
H
L
H
PAON
H
X
H
X
L
Tx puncture (SPI Only)
The modem in CDMA transmit mode operates the I and Q DAC in S1M8657, which then outputs the CDMA
spread-spectrum with Tx IF mid-frequency. All the circuits in S1M8657 are stopped in CDMA receive mode (Idle).
The modem only operates Q-DAC in the FM transmit mode (Talk). Besides this, all CDMA related circuits are
stopped. The signal for FM modulation passes through the Q-FM-LPF (FM-MOD) output pin to come out.
All
circuits in S1M8657 are stopped in FM receive only mode (Idle). Because Tx puncture mode can only be
controlled through the SPI bus, it turns on and off the blocks related to the intervals with no data. By doing so, it
minimizes the consumption current. The SPI registers related to this feature are controlled by setting PAON =
Low, SEN = High, IDLEB = High.
Tx Phase Locked Loop
S1M8657 has a built-in programmable PLL which can determine the IF mid-frequency. If the SPI BUS is not
used, the default value in the built-in register must be used; the Tx IF frequency is 130.38Mhz when TCXO =
19.68Mhz. The block diagram of the PLL is shown in Figure 7. The PLL is composed of the VCO, R-Divider, N-
Divider, and Phase Detector, while the Loop filter and VCO components are outside S1M8657. The divide ratios
in the PLL R and N counters can be programmed through the SPI bus. These can change the phase comparison
frequency. The N-Counter is composed of a 9-BIT A-Counter and 4-BIT B-Counter and 8/9 or 16/17 Dual-
Modulus Prescaler.
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