參數(shù)資料
型號: S1C88832F0A0100
元件分類: 微控制器/微處理器
英文描述: MICROCONTROLLER, PQFP128
封裝: PLASTIC, QFP-128
文件頁數(shù): 94/160頁
文件大?。?/td> 1244K
代理商: S1C88832F0A0100
S1C88832/88862 TECHNICAL MANUAL
EPSON
31
5 PERIPHERAL CIRCUITS AND THEIR OPERATION (Oscillation Circuits and Operating Mode)
5.3.7 Control of oscillation circuit and operating mode
Table 5.3.7.1 shows the control bits for the oscillation circuits and operating modes.
Table 5.3.7.1 Oscillation circuit and operating mode control bits
VDC1, VDC0: 00FF02HD1, D0
Selects the operating mode according to supply
voltage and operating frequency.
Table 5.3.7.2 shows the correspondence between
register preset values and operating modes.
Table 5.3.7.2 Correspondence between register
preset values and operating modes
CLKCHG: 00FF02HD3
Selects the operating clock for the CPU.
When "1" is written: OSC3 clock
When "0" is written: OSC1 clock
Reading:
Valid
When the operating clock for the CPU is switched
to OSC3, CLKCHG should be set to "1" and when
the clock is switched to OSC1, CLKCHG should be
set to "0".
At initial reset, CLKCHG is set to "0" (OSC1 clock).
2.4–5.5 V
1.8–3.5 V
3.5–5.5 V
Operating
frequency
4.2 MHz
80 kHz
8.2 MHz
VD1
2.2 V
1.3 V
3.3 V
VDC1
0
1
VDC0
0
1
×
Normal mode
Low power mode
High speed mode
(Max.)
Operating
mode
Power
voltage
*
The VD1 voltage is the value where VSS has been
made the standard (GND).
At initial reset, this register is set to "0" (normal
mode).
OSCC: 00FF02HD2
Controls the ON and OFF settings of the OSC3
oscillation circuit.
When "1" is written: OSC3 oscillation ON
When "0" is written: OSC3 oscillation OFF
Reading:
Valid
When the CPU and some peripheral circuits
(output port, serial interface and programmable
timer) are to be operated at high speed, OSCC is to
be set to "1". At all other times, it should be set to
"0" in order to reduce current consumption.
At initial reset, OSCC is set to "0" (OSC3 oscillation
OFF).
Address Bit
Name
SR R/W
Function
Comment
10
00FF02 D7
D6
D5
D4
D3
D2
D1
D0
EBR
WT2
WT1
WT0
CLKCHG
OSCC
VDC1
VDC0
General-purpose register
CPU operating clock switch
OSC3 oscillation On/Off control
Operating mode selection
0
R/W
1
OSC3
On
0
OSC1
Off
VDC1
1
0
VDC0
×
1
0
High speed (VD1=3.3V)
Low power (VD1=1.3V)
Normal
(VD1=2.2V)
Operating mode
Reserved register
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