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參數(shù)資料
| 型號(hào)： | RN5VM112C |
| 廠商： | Ricoh Co., Ltd. |
| 英文描述： | High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State Outputs 16-SO -55 to 125 |
| 中文描述： | 鋰離子電池保護(hù) |
| 文件頁數(shù)： | 16/25頁 |
| 文件大小： | 180K |
| 代理商： | RN5VM112C |
RN5VM1
××
C/D
12
· The VD2 monitors a V
DD
pin voltage. When the V
DD
voltage crosses the over-discharge detector threshold V
DET2
from
a high value to a value lower than the V
DET2
, the VD2 can sense an over-discharging and the external discharge control
Nch-MOS-FET turns to “OFF” with the D
OUT
pin being at “L”.
· Resetting the VD2 with the D
OUT
pin level being “H” again after detecting over-discharge is only possible by connecting
a charger to the battery pack. When the V
DD
voltage stays under over-discharge detector threshold V
DET2
charge current
can flow through parasitic diode of external discharge control Nch-MOS-FET, then after the V
DD
voltage comes up to a
value larger than V
DET2
discharging process would be advanced through “ON” state discharge control Nch-MOS-FET.
Connecting a charger to the battery pack makes the D
OUT
level being “H” instantaneously when the V
DD
voltage is high-
er than V
DET2
.
· When a cell voltage equals to zero, connecting charger to the battery pack makes the system allowable for charge with
higher charge voltage than Vst, 1.2V Max.
· An output delay time for the over-discharge detection is fixed internally. Though the V
DD
voltage would be going down
to a lower level than V
DET2
if it is within a time period of the output delay time, VD2 would not output a signal for turning
“OFF” of discharge control Nch-MOS-FET.
· After detection of an over-discharge by VD2, supply current would be reduced to 0.3μA TYP. at V
DD
=2.0V and into stand-
by, only the charger detector is operating.
· The output type of D
OUT
pin is CMOS having “H” level of V
DD
and “L” level of Vss.
VD2/Over-Discharge Detector
· Both of the excess current detector and short circuit protector can work when both control Nch-MOS-FETs are in “ON”
state.
When the V- pin voltage is going up to a value between the short protection voltage Vshort and excess current threshold
V
DET3
, the excess current detector operates and further soaring of V- pin voltage higher than Vshort makes the short cir-
cuit protector enabled. As a result the external discharge control Nch-MOS-FET turns to “OFF” with the D
OUT
pin being
at “L”.
· An output delay time for the excess current detector is internally fixed, 13ms TYP. at V
DD
=3.0V. A quick recovery of V-
pin level from a value between Vshort and V
DET3
within the delay time keeps the discharge control FET staying
“ON”state.
When the short circuit protector is enabled, the D
OUT
would be “L” and its delay time would be 5μs TYP.
· The V- pin has a built-in pull down resistor, TYP.100k
, connected to the Vss pin.
After an excess current or short circuit protection is detected, removing a cause of excess current or external short cir-
cuit makes an external discharge control Nch-MOS-FET to an “ON” state automatically with the V- pin level being down
to the Vss level through the built-in pull down resistor.
· When V
DD
voltage is higher than V
DET2
at a time when the excess current is detected the 5VM does not enter a standby
mode, while V
DD
voltage is lower than V
DET2
the 5VM enters a standby mode.
After detecting short circuit the 5VM will not enter a standby mode.
VD3/Excess Current Detector, Short Circuit Protector
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RN5VM112C-TR | High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State Outputs 16-TSSOP -55 to 125 |
| RN5VM112D | High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State Outputs 16-TSSOP -55 to 125 |
| RN5VM112D-TR | High Speed CMOS Logic Quad D-Type Flip-Flops with 3-State Outputs 16-TSSOP -55 to 125 |
| RN73C2A115KBTG | RESISTOR SMD 115K |
| RN73C2A118KBTG | RESISTOR SMD 118K |
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