- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄378161 > RM5231-150-Q (PMC-SIERRA INC) RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released PDF資料下載
參數(shù)資料
| 型號： | RM5231-150-Q |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released |
| 中文描述： | 64-BIT, 150 MHz, MICROPROCESSOR, PQFP128 |
| 封裝： | POWER, QFP-128 |
| 文件頁數(shù)： | 34/39頁 |
| 文件大?。?/td> | 630K |
| 代理商： | RM5231-150-Q |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁當(dāng)前第34頁第35頁第36頁第37頁第38頁第39頁
Proprietary and Confidential to PMC-Sierra, Inc and for its Customer
’
s Internal Use
Document ID: PMC-2002165, Issue 1
34
RM5231
Microprocessor with 32-bit System Bus Data Sheet
Released
9.3
System Interface Parameters
1
9.4
Boot-Time Interface Parameters
Parameter
Data Output
2,3
t
DO
Symbol
Conditions
150
–
250 MHz CPU
Speed
Min
Max
1.0
4.5
Units
ns
mode14..13 = 10 (fastest)
5
mode14..13 = 11
5
1.0
5.0
ns
mode14..13 = 00
5
1.0
5.5
ns
mode14..13 = 01 (slowest)
5
t
rise
= see above table
t
fall
= see above table
1.0
6.0
ns
Data Setup
4
t
DS
2.5
ns
Data Hold
4
Notes
1.
Timings are measured from 1.5 V of the clock to 1.5 V of the signal.
2.
Capacitive load for all maximum output timings is 50 pF. Minimum output timings are for a theoretical no
load condition - untested.
3.
Data Output timing applies to all signal pins whether tristate I/O or output only.
4.
Setup and Hold parameters apply to all signal pins whether tristate I/O or input only.
5.
Only mode 14:13 = 00 is tested and guaranteed.
t
DH
1.0
ns
Parameter
Mode Data Setup
Symbol
t
DS
(M)
t
DH
(M)
CPU Speed
150
–
250 MHz
Min
4
Units
SysClock cycles
Max
Mode Data Hold
0
SysClock cycles
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| RM5231 | RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released |
| RM5231-200-Q | RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released |
| RM5231-250-Q | RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released |
| RM5231A | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
| RM5231A-250-H | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RM5231-150Q-C001 | 制造商:PMC-Sierra 功能描述: |
| RM5231-200Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5231-225Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5231-250Q | 制造商:QED 功能描述:Microprocessor, 64 Bit, 128 Pin, Plastic, QFP |
| RM5231A | 制造商:PMC 制造商全稱:PMC 功能描述:64-Bit MIPS RISC Microprocessor with 32/64-Bit System Bus |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。