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參數(shù)資料
| 型號： | RM5231-150-Q |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released |
| 中文描述： | 64-BIT, 150 MHz, MICROPROCESSOR, PQFP128 |
| 封裝： | POWER, QFP-128 |
| 文件頁數(shù)： | 16/39頁 |
| 文件大?。?/td> | 630K |
| 代理商： | RM5231-150-Q |
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Proprietary and Confidential to PMC-Sierra, Inc and for its Customer
’
s Internal Use
Document ID: PMC-2002165, Issue 1
16
RM5231
Microprocessor with 32-bit System Bus Data Sheet
Released
Figure 4 CP0 Registers
3.13 Virtual to Physical Address Mapping
The RM5231 provides three modes of virtual addressing:
user mode
kernel mode
supervisor mode
This mechanism is available to system software to provide a secure environment for user
processes. Bits in the CP0 Status register determine which virtual addressing mode is used. In the
user mode, the RM5231 provides a single, uniform virtual address space of 1TB (2 GB in 32-bit
mode).
When operating in the kernel mode, four distinct virtual address spaces, totalling over 2.5 TB (4
GB in 32-bit mode), are simultaneously available and are differentiated by the high-order bits of
the virtual address.
The RM5231 processors also support a supervisor mode in which the virtual address space over 2
TB (2.5 GB in 32-bit mode), divided into three regions based on the high-order bits of the virtual
address.
When the RM5231 is configured as a 64-bit microprocessor, the virtual address space layout is an
upward compatible extension of the 32-bit virtual address space layout.
Figure 5 shows the address space layout for 32-bit operation.
0
47
TLB
(entries protected
from TLBWR)
EntryHi
10*
EntryLo0
2*
EntryLo1
3*
PageMask
5*
Wired
6*
Random
1*
Index
0*
Status
12*
Cause
13*
EPC
14*
ErrorEPC
30*
Count
9*
Compare
11*
Context
4*
PRId
15*
Config
16*
TagHi
29*
TagLo
28*
ECC
26*
CacheErr
27*
BadVAddr
8*
LLAddr
17*
* Register number
XContext
20*
Used for memory
management
Used for exception
processing
相關PDF資料 |
PDF描述 |
|---|---|
| RM5231 | RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released |
| RM5231-200-Q | RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released |
| RM5231-250-Q | RM5231⑩ Microprocessor with 32-Bit System Bus Data Sheet Released |
| RM5231A | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
| RM5231A-250-H | RM5231A⑩ Microprocessor with 32-Bit System Bus Data Sheet Preliminary |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| RM5231-150Q-C001 | 制造商:PMC-Sierra 功能描述: |
| RM5231-200Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5231-225Q | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:64-Bit Microprocessor |
| RM5231-250Q | 制造商:QED 功能描述:Microprocessor, 64 Bit, 128 Pin, Plastic, QFP |
| RM5231A | 制造商:PMC 制造商全稱:PMC 功能描述:64-Bit MIPS RISC Microprocessor with 32/64-Bit System Bus |
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