參數(shù)資料
型號: R5F5630DCDFC#V0
廠商: Renesas Electronics America
文件頁數(shù): 58/165頁
文件大?。?/td> 0K
描述: MCU RX630 1.5MB FLASH 176LQFP
產品培訓模塊: RX Compare Match Timer
RX DMAC
標準包裝: 1
系列: RX600
核心處理器: RX
芯體尺寸: 32-位
速度: 100MHz
連通性: CAN,EBI/EMI,I²C,LIN,SCI,SPI,USB
外圍設備: DMA,LVD,POR,PWM,WDT
輸入/輸出數(shù): 148
程序存儲器容量: 1.5MB(1.5M x 8)
程序存儲器類型: 閃存
RAM 容量: 128K x 8
電壓 - 電源 (Vcc/Vdd): 2.7 V ~ 3.6 V
數(shù)據(jù)轉換器: A/D 8x10b,21x12b,D/A 2x10b
振蕩器型: 內部
工作溫度: -40°C ~ 85°C
封裝/外殼: 176-LQFP
包裝: 托盤
R01DS0060EJ0100 Rev.1.00
Page 150 of 168
Sep 13, 2011
RX630 Group
5. Electrical Characteristics
5.9
Power-on Reset Circuit and Voltage Detection Circuit Characteristics
Note: The minimum VCC down time indicates the time when VCC is below the minimum value of voltage detection levels VPOR, Vdet1,
and Vdet2 for the POR/ LVD.
Figure 5.40
Power-on Reset Timing
Table 5.26
Power-on Reset Circuit and Voltage Detection Circuit Characteristics
Conditions: VCC = AVCC0 = VCC_USB = VBATT = 2.7 to 3.6 V, VREFH/VREFH0 = 2.7 V to AVCC0
VSS = AVSS0 = VREFL/VREFL0 = VSS_USB = 0 V
Ta = Topr
Item
Symbol
Min.
Typ.
Max.
Unit
Test Conditions
Voltage detection
level
Power-on reset
(POR)
Low power
consumption
function disabled
VPOR
2.5
2.6
2.7
V
Low power
consumption
function enabled
2.0
2.35
2.7
Voltage detection circuit (LVD0)
Vdet0
2.7
2.80
2.9
Voltage detection circuit (LVD1)
Vdet1_A
2.75
2.95
3.15
Voltage detection circuit (LVD2)
Vdet2_A
2.75
2.95
3.15
Internal reset time
Power-on reset time
tPOR
4.6
ms
LVD0 reset time
tLVD0
4.6
LVD1 reset time
tLVD1
0.9
LVD2 reset time
tLVD2
0.9
Minimum VCC down time
tVOFF
200
s
Response delay time
tdet
200
s
LVD operation stabilization time (after LVD is enabled)
Td(E-A)
3
s
Hysteresis width (LVD1 and LVD2)
V LVH
—80
mV
Internal reset signal
(active-low)
VCC
tVOFF
tdet
tPOR
tdet
tPOR
tdet
VPOR
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