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參數(shù)資料
| 型號(hào)： | R5F5630DCDFC#V0 |
| 廠商： | Renesas Electronics America |
| 文件頁(yè)數(shù)： | 134/165頁(yè) |
| 文件大?。?/td> | 0K |
| 描述： | MCU RX630 1.5MB FLASH 176LQFP |
| 產(chǎn)品培訓(xùn)模塊： | RX Compare Match Timer RX DMAC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | RX600 |
| 核心處理器： | RX |
| 芯體尺寸： | 32-位 |
| 速度： | 100MHz |
| 連通性： | CAN，EBI/EMI，I²C，LIN，SCI，SPI，USB |
| 外圍設(shè)備： | DMA，LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 148 |
| 程序存儲(chǔ)器容量： | 1.5MB（1.5M x 8） |
| 程序存儲(chǔ)器類型： | 閃存 |
| RAM 容量： | 128K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10b，21x12b，D/A 2x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 176-LQFP |
| 包裝： | 托盤 |
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R01DS0060EJ0100 Rev.1.00
Page 70 of 168
Sep 13, 2011
RX630 Group
2. CPU
2.1
General-Purpose Registers (R0 to R15)
This CPU has sixteen general-purpose registers (R0 to R15). R1 to R15 can be used as data registers or address registers.
R0, a general-purpose register, also functions as the stack pointer (SP). The stack pointer is switched to operate as the
interrupt stack pointer (ISP) or user stack pointer (USP) by the value of the stack pointer select bit (U) in the processor
status word (PSW).
2.2
Control Registers
(1)
Interrupt Stack Pointer (ISP)/User Stack Pointer (USP)
The stack pointer (SP) can be either of two types, the interrupt stack pointer (ISP) or the user stack pointer (USP).
Whether the stack pointer operates as the ISP or USP depends on the value of the stack pointer select bit (U) in the
processor status word (PSW).
Set the ISP or USP to a multiple of four, as this reduces the numbers of cycles required to execute interrupt sequences
and instructions entailing stack manipulation.
(2)
Interrupt Table Register (INTB)
The interrupt table register (INTB) specifies the address where the relocatable vector table starts.
(3)
Program Counter (PC)
The program counter (PC) indicates the address of the instruction being executed.
(4)
Processor Status Word (PSW)
The processor status word (PSW) indicates results of instruction execution or the state of the CPU.
(5)
Backup PC (BPC)
The backup PC (BPC) is provided to speed up response to interrupts.
After a fast interrupt has been generated, the contents of the program counter (PC) are saved in the BPC.
(6)
Backup PSW (BPSW)
The backup PSW (BPSW) is provided to speed up response to interrupts.
After a fast interrupt has been generated, the contents of the processor status word (PSW) are saved in the BPSW. The
allocation of bits in the BPSW corresponds to that in the PSW.
(7)
Fast Interrupt Vector Register (FINTV)
The fast interrupt vector register (FINTV) is provided to speed up response to interrupts.
The FINTV register specifies a branch destination address when a fast interrupt has been generated.
(8)
Floating-Point Status Word (FPSW)
The floating-point status word (FPSW) indicates the results of floating-point operations.
When an exception handling enable bit (Ej) enables the exception handling (Ej = 1), the exception cause can be identified
by checking the corresponding Cj flag in the exception handling routine. If the exception handling is masked (Ej = 0), the
occurrence of exception can be checked by reading the Fj flag at the end of a series of processing. Once the Fj flag has
been set to 1, this value is retained until it is cleared to 0 by software (j = X, U, Z, O, or V).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R5F5630DCDFP | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCUs |
| R5F5630DCDFP#V0 | 制造商:Renesas Electronics Corporation 功能描述:RX630 1.5MB/128K 100LQFP - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 32BIT 1.5MB FLASH 100LQFP |
| R5F5630DCDLB | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCUs |
| R5F5630DCDLC | 制造商:RENESAS 制造商全稱:Renesas Technology Corp 功能描述:Renesas MCUs |
| R5F5630DCDLC#U0 | 制造商:Renesas Electronics Corporation 功能描述:RX630 1.5MB/128KB LGA177 100MHZ - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 32BIT 1.5MB 128KB 177LGA |
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