
R8C/3JM Group
20. Timer RD
R01UH0285EJ0100 Rev.1.00
Aug 08, 2011
j = A, B, C, or D
Table 20.11
Reset Synchronous PWM Mode Specifications
Item
Specification
Count sources
f1, f2, f4, f8, f32, fOCO40M, fOCO-F
External signal input to the TRDCLK pin (valid edge selected by a
program)
Count operations
The TRD0 register is incremented (the TRD1 register is not used).
PWM waveform
PWM period
: 1/fk × (m+1)
Active level width of normal-phase : 1/fk × (m-n)
Active level width of counter-phase: 1/fk × (n+1)
fk: Frequency of count source
m: Value set in the TRDGRA0 register
n: Value set in the TRDGRB0 register (PWM1 output),
Value set in the TRDGRA1 register (PWM2 output),
Value set in the TRDGRB1 register (PWM3 output)
Count start condition
1 (count starts) is written to the TSTART0 bit in the TRDSTR register.
Count stop conditions
0 (count stops) is written to the TSTART0 bit when the CSEL0 bit in
the TRDSTR register is set to 1. (The PWM output pin outputs the
initial output level selected by bits OLS0 and OLS1 in the TRDFCR
register.)
When the CSEL0 bit in the TRDSTR register is set to 0, the count
stops at the compare match in the TRDGRA0 register. (The PWM
output pin outputs the initial output level selected by bits OLS0 and
OLS1 in the TRDFCR register.)
Interrupt request generation
timing
Compare match (The content of the TRD0 register matches content
of registers TRDGRj0, TRDGRA1, and TRDGRB1)
The TRD0 register overflows
TRDIOA0 pin function
Programmable I/O port or TRDCLK (external clock) input
TRDIOB0 pin function
PWM1 output normal-phase output
TRDIOD0 pin function
PWM1 output counter-phase output
TRDIOA1 pin function
PWM2 output normal-phase output
TRDIOC1 pin function
PWM2 output counter-phase output
TRDIOB1 pin function
PWM3 output normal-phase output
TRDIOD1 pin function
PWM3 output counter-phase output
TRDIOC0 pin function
Output inverted every PWM period
INT0 pin function
Programmable I/O port, pulse output forced cutoff signal input, or
INT0 interrupt input
Read from timer
The count value can be read by reading the TRD0 register.
Write to timer
The value can be written to the TRD0 register.
Selectable functions
The normal-phase and counter-phase active level and initial output
level are selected individually.
Pulse output forced cutoff signal input (Refer to 20.2.4 Pulse A/D trigger generation
m+1
Normal-phase
n+1
(When “L” is selected as the active level)
Counter-phase
m-n