
R8C/36T-A Group
13. DTC
Under development Preliminary document
Specifications in this document are tentative and subject to change.
R01UH0240EJ0010 Rev.0.10
Page 166 of 728
Aug 05, 2011
13.2.1
DTC Activation Control Register (DTCTL)
Note:
1. This bit is set to 0 when the read result is 1 and then 0 is written to the same bit. This bit remains unchanged
even if the read result is 0 and then 0 is written to the same bit. This bit remains unchanged if 1 is written to it.
The NMIF bit is set to 1 when a watchdog timer interrupt, an oscillation stop detection interrupt, a voltage
monitor 1 interrupt, or a voltage monitor 2 interrupt is generated.
When the NMIF bit is 1, the DTC is not activated even if an interrupt which enables DTC activation is
generated. If the NMIF bit is changed to 1 during a DTC transfer, the transfer continues until it has completed.
Table 13.5
DTC Register Configuration (4)
Register Name
Symbol
After Reset
Address
Access Size
DTC Transfer Count Register 20
DTCCT20
XXh
06CE2h
8
DTC Transfer Count Reload Register 20
DTRLD20
XXh
06CE3h
8
DTC Source Address Register 20
DTSAR20
XXXXh
06CE4h
16
DTC Destination Address Register 20
DTDAR20
XXXXh
06CE6h
16
DTC Control Register 21
DTCCR21
XXh
06CE8h
8
DTC Block Size Register 21
DTBLS21
XXh
06CE9h
8
DTC Transfer Count Register 21
DTCCT21
XXh
06CEAh
8
DTC Transfer Count Reload Register 21
DTRLD21
XXh
06CEBh
8
DTC Source Address Register 21
DTSAR21
XXXXh
06CECh
16
DTC Destination Address Register 21
DTDAR21
XXXXh
06CEEh
16
DTC Control Register 22
DTCCR22
XXh
06CF0h
8
DTC Block Size Register 22
DTBLS22
XXh
06CF1h
8
DTC Transfer Count Register 22
DTCCT22
XXh
06CF2h
8
DTC Transfer Count Reload Register 22
DTRLD22
XXh
06CF3h
8
DTC Source Address Register 22
DTSAR22
XXXXh
06CF4h
16
DTC Destination Address Register 22
DTDAR22
XXXXh
06CF6h
16
DTC Control Register 23
DTCCR23
XXh
06CF8h
8
DTC Block Size Register 23
DTBLS23
XXh
06CF9h
8
DTC Transfer Count Register 23
DTCCT23
XXh
06CFAh
8
DTC Transfer Count Reload Register 23
DTRLD23
XXh
06CFBh
8
DTC Source Address Register 23
DTSAR23
XXXXh
06CFCh
16
DTC Destination Address Register 23
DTDAR23
XXXXh
06CFEh
16
Address 00280h
Bit
b7b6
b5b4b3
b2b1b0
Symbol
After Reset
0
000
0000
Bit
Symbol
Bit Name
Function
R/W
b0
—
Reserved
Set to 0.
R/W
b1
NMIF
Non-maskable interrupt generation bit
0: Non-maskable interrupts not generated
1: Non-maskable interrupts generated
R/W
b2
—
Nothing is assigned. The read value is 0.
R
b3
—
b4
—
b5
—
b6
—
b7
—