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參數(shù)資料
| 型號： | R5F212ACSNFA |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 20 MHz, RISC MICROCONTROLLER, PQFP48 |
| 封裝： | 14 X 14 MM, 0.80 MM PITCH, PLASTIC, LQFP-48 |
| 文件頁數(shù)： | 12/138頁 |
| 文件大?。?/td> | 492K |
| 代理商： | R5F212ACSNFA |
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197
4317K–AVR–03/2013
AT90PWM2/3/2B/3B
The receive function example reads all the I/O Registers into the Register File before any com-
putation is done. This gives an optimal receive buffer utilization since the buffer location read will
be free to accept new data as early as possible.
18.7.3
Receive Complete Flag and Interrupt
The USART Receiver has one flag that indicates the Receiver state.
The Receive Complete (RXC) flag indicates if there are unread data present in the receive buf-
fer. This flag is one when unread data exist in the receive buffer, and zero when the receive
buffer is empty (i.e., does not contain any unread data). If the Receiver is disabled (RXEN = 0),
the receive buffer will be flushed and consequently the RXC bit will become zero.
When the Receive Complete Interrupt Enable (RXCIE) in UCSRB is set, the USART Receive
Complete interrupt will be executed as long as the RXC flag is set (provided that global inter-
rupts are enabled). When interrupt-driven data reception is used, the receive complete routine
must read the received data from UDR in order to clear the RXC flag, otherwise a new interrupt
will occur once the interrupt routine terminates.
18.7.4
Receiver Error Flags
The USART Receiver has three error flags: Frame Error (FE), Data OverRun (DOR) and Parity
Error (UPE). All can be accessed by reading UCSRA. Common for the error flags is that they are
located in the receive buffer together with the frame for which they indicate the error status. Due
to the buffering of the error flags, the UCSRA must be read before the receive buffer (UDR),
since reading the UDR I/O location changes the buffer read location. Another equality for the
error flags is that they can not be altered by software doing a write to the flag location. However,
all flags must be set to zero when the UCSRA is written for upward compatibility of future
USART implementations. None of the error flags can generate interrupts.
The Frame Error (FE) flag indicates the state of the first stop bit of the next readable frame
stored in the receive buffer. The FE flag is zero when the stop bit was correctly read (as one),
and the FE flag will be one when the stop bit was incorrect (zero). This flag can be used for
detecting out-of-sync conditions, detecting break conditions and protocol handling. The FE flag
is not affected by the setting of the USBS bit in UCSRC since the Receiver ignores all, except for
the first, stop bits. For compatibility with future devices, always set this bit to zero when writing to
UCSRA.
The Data OverRun (DOR) flag indicates data loss due to a receiver buffer full condition. A Data
OverRun occurs when the receive buffer is full (two characters), it is a new character waiting in
the Receive Shift Register, and a new start bit is detected. If the DOR flag is set there was one
or more serial frame lost between the frame last read from UDR, and the next frame read from
UDR. For compatibility with future devices, always write this bit to zero when writing to UCSRA.
The DOR flag is cleared when the frame received was successfully moved from the Shift Regis-
ter to the receive buffer.
The following example (See Figure 18-5.) represents a Data OverRun condition. As the receive
buffer is full with CH1 and CH2, CH3 is lost. When a Data OverRun condition is detected, the
OverRun error is memorized. When the two characters CH1 and CH2 are read from the receive
buffer, the DOR bit is set (and not before) and RxC remains set to warn the application about the
overrun error.
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| R5F212ACSNFA#U0 | 制造商:Renesas Electronics Corporation 功能描述:MCU 16-bit R8C CISC 128KB Flash 2.5V/3.3V/5V 64-Pin LQFP 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 128KB FLASH 64LQFP |
| R5F212ACSNFA#V0 | 功能描述:MCU FLASH 128KB 64-LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:R8C/2x/2A 標準包裝:96 系列:PIC® 16F 核心處理器:PIC 芯體尺寸:8-位 速度:20MHz 連通性:I²C，SPI 外圍設備:欠壓檢測/復位，POR，PWM，WDT 輸入/輸出數(shù):11 程序存儲器容量:3.5KB（2K x 14） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:128 x 8 電壓 - 電源 (Vcc/Vdd):2.3 V ~ 5.5 V 數(shù)據(jù)轉換器:A/D 8x10b 振蕩器型:內部 工作溫度:-40°C ~ 125°C 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 包裝:管件 |
| R5F212ACSNFA#V2 | 制造商:Renesas Electronics Corporation 功能描述:R8C/2A 128K/7.5K 64LQFP 14X14 - Trays 制造商:Renesas Electronics Corporation 功能描述:IC MCU 16BIT 128KB FLASH |
| R5F212ACSNFP | 制造商:Renesas Electronics Corporation 功能描述:Microcontroller,R8C/2A,ROM128K |
| R5F212ACSNFP#U0 | 制造商:Renesas Electronics Corporation 功能描述:MCU 16-Bit R8C CISC 128KB Flash 2.5V/3.3V/5V 64-Pin LQFP 制造商:Renesas Electronics Corporation 功能描述:MCU 16BIT R8C CISC 128KB FLASH 2.5V/3.3V/5V 64LQFP - Trays 制造商:Renesas Electronics 功能描述:R8C 20MHz 制造商:Renesas 功能描述:MCU 16-Bit R8C CISC 128KB Flash 2.5V/3.3V/5V 64-Pin LQFP |
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