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參數(shù)資料
| 型號： | R2A20111SPW0 |
| 廠商： | Renesas Technology Corp. |
| 元件分類： | 基準電壓源/電流源 |
| 英文描述： | Power Factor Correction Controller IC |
| 中文描述： | 功率因數(shù)校正控制芯片 |
| 文件頁數(shù)： | 38/41頁 |
| 文件大?。?/td> | 310K |
| 代理商： | R2A20111SPW0 |
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R2A20111SP/DD
REJ03F0231-0100 Rev.1.00 Mar 28, 2007
Page 38 of 40
6. Pattern Layout
In designing the pattern layout, pay as much attention as is possible to the following points.
(1) Place the IC pins (particularly, CGND, CAI, PFC-ON, IAC, FB) and their wiring as far from high-voltage switching
lines (particularly the drain voltage for the power MOSFET) as possible and in general design the wiring to
minimize switching noise.
(2) Wiring between CGND and Rcs via Rmo and wiring between CAI and RCS via Rmo connect nearly and separately
to Rcs.
(3) It is probable that stability operation is achieved by inputting signals via low pass filter to CLIMIT, PFC-ON, IAC,
FB terminal.
(4) Place a resistors and capacitors connect VREF , RT, CAO, CT, VCC as close to the IC as possible, and keep the
wiring short.
(5) Pattern layout priority (for reference)
1. Place the IC as far from high voltage switching lines as possible.
2. The pattern of the GND should be as wide as possible.
3. Place the stabilizing capacitor for VREF as close to the IC as possible.
4. Place the stabilizing capacitor for VCC as close to the IC s possible.
5. Place the resistors and capacitors (Rcao1, Rcao2, Ccao1, Ccao2) for CAO as close to the IC as possible.
6. Wiring between CGND and Rcs via Rmo and Wiring between CAI and Rcs via Rmo connect nearly and
separately to Rcs.
7. Place the timing resistor for RT as close to the IC as possible.
8. Place the timing capacitor for CT as close to the IC as possible.
9. Place the resistors and capacitors (Reo1, Reo2, Ceo1, Ceo2) for EO as close to the IC as possible.
10. Place the resistors and capacitors (Rpfc1, Rpfc2, Cpfc) for PFC-ON as close to the IC as possible.
11. Place the resistors (Rfb1, Rfb2) for FB as close to the IC as possible.
12. Place the resistors (Rac) for IAC as close to the IC as possible.
13. Place the resistors (Rclimit1, Rclimit2) for CLIMIT as close to the IC as possible.
14. Place the capacitor (Cdelay) for DELAY as close to the IC as possible.
15. Place the capacitor (Css) for SS as close to the IC as possible.
Cpfc
Rac
Rmo
Rcs
1000p
C
C
V
S
E
F
I
P
C
R
O
G
D
C
C
V
Cdelay
0.1
μ
Ct
Rt
Css
10
μ
12V
Rclimit1
Rclimit2
Vout
AC_Rectifier
Rpfc1
Rpfc2
Rfb1
Rfb2
Reo1
Reo2
Ceo1
Ceo2
Rmo
R2A20111
2
1
3
4
5
6
7
8
15
16
14
13
12
11
10
9
Rcao2
Rcao1
Ccao2
Ccao1
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