參數(shù)資料
型號(hào): Q67100-A6059
廠商: SIEMENS AG
英文描述: Primary Rate Access Clock Generator and Transceiver PRACT
中文描述: 主速率接入時(shí)鐘發(fā)生器和收發(fā)PRACT
文件頁數(shù): 30/53頁
文件大?。?/td> 418K
代理商: Q67100-A6059
HYB39S64400/800/160BT(L)
64MBit Synchronous DRAM
Semiconductor Group
29
9. AC Parameters
9.1 AC Parameters for a Write Timing
Auto Precharge
Command
Bank B
Write with
Activate
Command
Bank B
Write with
Auto Precharge
Activate
Command
Bank A
Command
Bank A
Addr.
AP
DQM
DQ
BS
Hi-Z
RCD
t
Ax2
Ax1
Ax0
Ax3
RC
t
RAx
RAx
t
AS
t
AH
RBx
RBx
CAx
Activate
Command
Precharge
Command
Bank A
Activate
Command
Write
Command
Bank A
Bank A
Bank A
SPT03910
Bx2
Bx1
Bx0
Bx3
DS
t
t
DH
Ay2
Ay1
Ay0
Ay3
t
WR
RAy
RAy
CBx
RAy
RP
t
RAz
RAz
T8
Precharge
Bank A
Begin Auto
CLK
WE
CAS
RAS
CS
CKE
CK2
t
CS
t
CH
CKS
t
CH
t
t
CL
t
T3
T0
T2
T1
T4
T5
T7
T6
Bank B
Precharge
Begin Auto
t
CKH
T18
Burst Length = 4, CAS Latency = 2
T13
T9
T10
T12
T11
T14
T15
T17
T16
T19
T20
T22
T21
RBy
RBy
RRD
t
Activate
Command
Bank B
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