參數(shù)資料
型號: PSD713S5
英文描述: Field Programmable Microcontroller Peripherals with Supervisory Functions(可編程邏輯,4K位SRAM,27個可編程I/O,通用PLD有66個輸入)
中文描述: 現(xiàn)場可編程微控制器外圍設備具有監(jiān)督職能(可編程邏輯,4K的位的SRAM,27余個可編程輸入/輸出,通用PLD的有66個輸入)
文件頁數(shù): 69/104頁
文件大?。?/td> 515K
代理商: PSD713S5
PSD7XX Family
13-69
The Power Monitor
The Power Monitor circuitry monitors the V
CC
supply and generates a reset pulse
whenever V
CC
drops below the selected reference voltage. The Voltage Comparator
compares V
CC
either with an internally generated reference voltage or with an external
reference voltage applied at the Vtp (PC6) pin.
The voltage comparator output can be applied directly to the reset generator or go through
a 100-microsecond digital sampler. The digital sampler acts as a filter to eliminate any
false trips that are created by V
CC
noises. The digital sampler runs on an internal 32KHz
oscillator, masking out any Voltage Comparator output that is less than 3 oscillator clock
cycles in duration.
If the external voltage reference is selected, an external resistor voltage divider is used to
provide the desired voltage input level that is compared with the internal bandgap reference
voltage of 1.29V. The voltage divider is shown in Figure 32 where Vmon is connected to the
monitored V
CC
supply. A typical application would be R2 is 10K ohm and Vmon is 4.75V.
The value of R1 is calculated as follows:
Vtp= Vmon x (R2 /( R1 + R2))
R1 = (4.75V x 10K)/1.29V - 10K = 26.8K
An internal reset is generated when Vmon drops below 4.75V.
Supervisory
Function
(cont.)
PC1
PC2
PC3
PC4
PC5
PC6
RST–OUT
VSTBY
CEOUT
VSTBYON
RST–OUT
Vtp
PSD7XX
V
mon
R1
R2
Figure 32. Voltage Divider Circuit for Vtp
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