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| 型號： | PSD713S5 |
| 英文描述： | Field Programmable Microcontroller Peripherals with Supervisory Functions(可編程邏輯，4K位SRAM,27個可編程I/O,通用PLD有66個輸入) |
| 中文描述： | 現(xiàn)場可編程微控制器外圍設備具有監(jiān)督職能（可編程邏輯，4K的位的SRAM，27余個可編程輸入/輸出，通用PLD的有66個輸入） |
| 文件頁數(shù)： | 2/104頁 |
| 文件大?。?/td> | 515K |
| 代理商： | PSD713S5 |
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PSD7XX Family
13-2
J
The PSD7XX provides all the supervisory functions required for a microcontroller
based system. The supervisory features include:
– System power supply monitoring with configurable trip points.
– User programmable WatchDog Timer, controlled by PPLD product terms.
– Reset generation based on input from:
1. Voltage comparator with programmable internal or external trip point.
2. Push button or system reset input.
3. WatchDog Timer time out.
– Automatic battery-backup of internal SRAM
– Write protect of internal SRAM and external battery back up device.
– Reset input debounce filter.
– Programmable reset pulse width generator.
J
Power Management Unit reduces the device standby current to 25 μA typical.
J
Twenty seven individually configurable I/O Port pins. The Ports may be used as MCU
I/Os, PLD I/Os, latched MCU address outputs or special function I/Os. Sixteen I/O port
pins can be configured as open drain outputs.
J
Internal EPROM in densities of 256 Kbit, 512 Kbit and 1 Mbit, configurable in eight
or sixteen-bit widths. The EPROM is divided into eight equal-size blocks, accessible
by user-specified addresses. The access time includes address latching and PLD
decoding. The EPROM includes a low power option.
J
Internal 4 Kbit SRAM can be configured in eight or sixteen-bit data widths. The
SRAM retains data if power is lost by automatically switching to standby power.
J
A page register expands the microcontroller address space by a factor of sixteen.
J
A security bit prevents copying the PSD7XX configuration and PLD logic as well as
the EPROM contents on device programmers.
J
The programmable Power Management Unit (PMU) supports two separate, low-power
modes allowing operations with as little as 25 μA (at 5V V
CC
). The device can
automatically detect a lack of microcontroller activity and put the PSD into power down
mode.
J
The devices are available in EPROM versions. The ceramic package is ideal for
prototyping and low-volume production, and in OTP versions for high-volume, low-cost
applications.
J
Package choices include 52 pin plastic (J) and ceramic (L) chip carriers.
J
PSD7XX family development is supported by the WSI PC based PSDsoft
design
system. The software is MS-Windows
and Windows 95 compatible. The suite
includes PSDabel
(ABEL
), to specify the PLD logic, and an efficient fitter. The tool
also includes the PSDsilosIII simulator from SIMUCAD
. The MagicPro
III programmer
is an engineering development tool and can program any PSD device.
Key Features
(cont.)
Please refer to the revision block at
the end of this document for updated
information.
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| PSD813F | Flash In-System-Programmable Microcontroller Peripherals(閃速，在系統(tǒng)可編程微控制器外圍器件，1M位閃速存儲器，256K位EEPROM，16K位SRAM) |
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