參數(shù)資料
型號(hào): PSD601E1
英文描述: Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
中文描述: 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備和嵌入式微-細(xì)胞(可編程邏輯,4K的位的SRAM,26我個(gè)可編程輸入/輸出,通用PLD的有63個(gè)輸入)
文件頁(yè)數(shù): 26/84頁(yè)
文件大?。?/td> 426K
代理商: PSD601E1
PSD6XX Family
11-26
Bus Interface
(cont.)
M
C
W
R
B
A
R
D
A
D
A
D
A
P
P
A
P
B
P
C
W
R
B
R
A
P
(
(
P
Figure 11. An Example of a Typical Non-Multiplexed Bus Interface,
8 or 16-Bit Data Bus
PSD6XXE1 Interface To a Non-Multiplexed Bus
Figure 11 shows an example of a system using a microcontroller with a non-multiplexed
bus and a PSD6XXE1. The address bus is connected to the ADIO Port, and the data bus is
connected to Port A (D[7:0]) and to Ports B (D[15:8], 16-bit data bus only). The data Ports
are in tri-state mode when the PSD6XXE1 is not accessed by the microcontroller. Should
the system address bus exceed sixteen bits, Port A, B, or C may be used as additional
address inputs.
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PDF描述
PSD602E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
PSD603E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
PSD612E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
PSD613E1 Field Programmable Microcontroller Peripherals with Embedded Micro--Cell(可編程邏輯,4K位SRAM,26個(gè)可編程I/O,通用PLD有63個(gè)輸入)
PSD703S5 Field Programmable Microcontroller Peripherals with Supervisory Functions(可編程邏輯,4K位SRAM,27個(gè)可編程I/O,通用PLD有66個(gè)輸入)
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