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| 型號(hào)： | PSD511B1 |
| 英文描述： | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入) |
| 中文描述： | 現(xiàn)場(chǎng)可編程微控制器外圍設(shè)備（可編程邏輯，16K的位的SRAM，40余個(gè)可編程輸入/輸出，通用PLD的有61個(gè)輸入） |
| 文件頁(yè)數(shù)： | 99/130頁(yè) |
| 文件大小： | 704K |
| 代理商： | PSD511B1 |
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PSD5XX Famly
6-99
Interrupt
Controller
(Cont.)
Interrupt Operation
(Cont.)
Input/Output
Interrupt inputs INT4 and INT5 originate from two dedicated PPLD product terms PT2INT4
and PT2INT5. Interrupt inputs INT6 and INT7 originate from the outputs of the PPLD
Macrocells MC2INT6 and MC2INT7 as described in the next section and the remaining
interrupt inputs INT0 through INT3 originate from four Terminal-Count (TC) outputs of the
Counter/Timers. If an External event has to cause an interrupt in the PSD5XX, it has to be
routed through the PPLD.
Regarding output from the Interrupt Controller, whenever an unmasked interrupt occurs, a
Global Interrupt signal is generated. The Global Interrupt signal can be used as a ZPLD
input (INTR2PLD). Refer to Figure 45 for details. It can also be driven off the chip by using
the special-function out capability of Port E (PE2) as INTR_OUT. In either case, the Global
Interrupt indicates to the MCU that an internal PSD5XX interrupt has occurred. Refer to the
section on I/O ports for specific details of setting up the port functions.
PPLDMacrocell
Interrupt inputs INT6 and INT7 originate two dedicated PPLD Macrocells. Each of these
PPLD Macrocells have two product terms as inputs that are inputted into a PPLD Macrocell
as shown in Figure 47. The outputs of both PPLD Macrocells MC2INT6 and MC2INT7 are
either Combinatorial or Register mode. The polarity of the product terms is programmable.
Refer to the section on “ZPLD” for further reference on the PPLD.
Interrupt Flowchart
The flowchart in Figure 48 explains the overall initialization and the servicing
of the interrupts.
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| PSD502B1 | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入) |
| PSD503B1 | Field Programmable Microcontroller Peripherals(可編程邏輯，16K位SRAM,40個(gè)可編程I/O,通用PLD有61個(gè)輸入) |
| PSD502B1-12U | 200V 100kRad Hi-Rel Single N-Channel TID Hardened MOSFET in a TO-204AE package; Similar to IRH7250 with optional Total Dose Rating of 1000kRads |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| PSD511B1-12J | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral |
| PSD511B1-12JI | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral |
| PSD511B1-12LI | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral |
| PSD511B1-12U | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral |
| PSD511B1-12UI | 制造商:未知廠家 制造商全稱(chēng):未知廠家 功能描述:Field-Programmable Peripheral |
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