參數(shù)資料
型號(hào): PPC440GX-3CC533S
廠商: APPLIEDMICRO INC
元件分類: 微控制器/微處理器
英文描述: Power PC 440GX Embedded Processor
中文描述: 32-BIT, 533 MHz, RISC PROCESSOR, CBGA552
封裝: 25 X 25 MM, CERAMIC, FBGA-552
文件頁數(shù): 57/93頁
文件大?。?/td> 794K
代理商: PPC440GX-3CC533S
440GX – Power PC 440GX Embedded Processor
AMCC
57
Revision 1.15 – August 30, 2007
Data Sheet
Trace Interface
TrcBS0:2
Trace branch execution status.
I/O
3.3V LVTTL
TrcClk
Trace data capture clock, runs at 1/4 the frequency of the
processor.
O
3.3V LVTTL
TrcES0:4
Trace Execution Status is presented every fourth processor clock
cycle.
I/O
3.3V LVTTL
TrcTS0:5
(multiplexed with GPIO signals)
Additional information on trace execution and branch status.
Note:
The trace signals, TrcTS0:6, are duplicated on two sets of
chip balls and are multiplexed with other signals in both
cases. This allows users to choose which set of
multiplexed signals they wish to use along with the
TrcTS0:6 signals. The trace signals in this set are
primary
signals.
I/O
3.3V tolerant
2.5V CMOS
TrcTS1:5
(multiplexed with EBC signals)
Additional information on trace execution and branch status.
Note:
The trace signals in this set are
secondary
signals.
I/O
3.3V LVTTL
TrcTS6
(multiplexed with EBC and
Ethernet signals)
Additional information on trace execution and branch status.
Note:
This trace signal is the
primary
signal.
I/O
3.3V LVTTL
Power Pins
AGND
PLL (analog) voltage ground.
na
na
GND
Ground.
na
na
AxV
DD
1.5V—Filtered voltages input for PLLs (analog circuits)
Note:
A separate filter for each of the three voltages is
recommended.
na
na
OV
DD
3.3V supply—I/O (except DDR SDRAM, Ethernet)
na
na
SV
DD
2.5V supply—DDR SDRAM, Ethernet
na
na
V
DD
1.5V supply—Logic voltage.
na
na
Signal Functional Description
(Sheet 8 of 8)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
Ω
to 3.3V
)
3. Must pull down (recommended value is 1k
Ω
)
4. If not used, must pull up (recommended value is 3k
Ω
to 3.3V)
5. If not used, must pull down (recommended value is 1k
Ω
)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
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