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參數(shù)資料
| 型號： | PPC440GP-3RC500CZ |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | Power PC 440GP Embedded Processor |
| 中文描述： | 32-BIT, 500 MHz, RISC PROCESSOR, CBGA552 |
| 封裝： | 25 X 25 MM, ROHS COMPLIANT, CERAMIC, BGA-552 |
| 文件頁數(shù)： | 53/83頁 |
| 文件大?。?/td> | 773K |
| 代理商： | PPC440GP-3RC500CZ |
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440GP – Power PC 440GP Embedded Processor
AMCC
53
Revision 1.07 – October 4, 2007
Data Sheet
System Interface
SysClk
Main system clock input.
Clock
5V tolerant
3.3V LVTTL
SysErr
Set to 1 when a machine check is generated.
O
5V tolerant
3.3V LVTTL
SysReset
Main system reset. External logic can drive this bidirectional pin
low (minimum of 16 cycles) to initiate a system reset. A system
reset can also be initiated by software. The signal is implemented
as an open-drain output (two states; 0 or open circuit).
During chip power-up, this signal must be low from the start of V
DD
ramp-up until at least 16 SysClk cycles after V
DD
is stable.
I/O
5V tolerant
3.3V LVTTL
1, 2
TmrClk
Processor timer external input clock.
I
5V tolerant
3.3V LVTTL
Halt
Halt from external debugger.
I
5V tolerant
3.3V LVTTL
1, 4
GPIO00:31
General purpose I/O 0 through 10. To access these functions,
software must set DCR register bits.
I/O
5V tolerant
3.3V LVTTL
TestEn
Test Enable.
I
1.8V CMOS
w/pull-down
3
RcvrInh
Receiver Inhibit. Active only when TestEn is active.
I
5V tolerant
3.3V LVTTL
RefVEn
Reference Voltage Enable. Do not connect for normal operation.
Pull up for Boundary Scan Description Language (BSDL) testing.
I
1.8V CMOS
w/pull-down
DrvrInh1:2
Driver Inhibit. Used for test purposes only. Tie up for normal
operation
I
5V tolerant
3.3V LVTTL
2
Signal Functional Description
(Sheet 6 of 7)
Notes:
1. Receiver input has hysteresis
2. Must pull up (recommended value is 3k
Ω
to 3.3V, 10k
Ω
to 5V
)
3. Must pull down (recommended value is 1k
Ω
)
4. If not used, must pull up (recommended value is 3k
Ω
to 3.3V)
5. If not used, must pull down (recommended value is 1k
Ω
)
6. Strapping input during reset; pull-up or pull-down required
Signal Name
Description
I/O
Type
Notes
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