參數(shù)資料
型號(hào)： PPC405GPR-3KB400
廠商： APPLIEDMICRO INC
元件分類： 微控制器/微處理器
英文描述： Power PC 405GPr Embedded Processor
中文描述： 32-BIT, 400 MHz, RISC PROCESSOR, PBGA456
封裝： 27 X 27 MM, LEAD FREE, PLASTIC, EBGA-456
文件頁(yè)數(shù)： 41/57頁(yè)
文件大?。?/td> 614K
代理商： PPC405GPR-3KB400
405GPr – Power PC 405GPr Embedded Processor
AMCC
41
Revision 2.04 – September 7, 2007
Data Sheet
DC Electrical Characteristics
Parameter
Symbol
Typical
Maximum
Unit
Active Operating Current (V
DD
)–266MHz
I
DD
300
610
mA
Active Operating Current (V
DD
)–333MHz
I
DD
325
690
mA
Active Operating Current (V
DD
)–400MHz
I
DD
355
770
mA
Active Operating Current (OV
DD
)
I
ODD
45
200
mA
PLL V
DD
Input current
I
PLL
16
23
mA
Active Operating Power–266MHz
P
DD
0.72
1.92
W
Active Operating Power–333MHz
P
DD
2.07
W
Active Operating Power–400MHz
P
DD
0.82
2.23
W
Note:
1. The maximum current and power values listed above are not guaranteed to be the highest obtainable. These values are dependent on
many factors including the type of applications running, clock rates, use of internal functional capabilities, external interface usage, case
temperature, and the power supply voltages. Your specific application can produce significantly different results. V
DD
(logic) current and
power are primarily dependent on the applications running and the use of internal chip functions (DMA, PCI, Ethernet, and so on). OV
DD
(I/O) current and power are primarily dependent on the capacitive loading, frequency, and utilization of the external buses. The following
information provides details about the conditions under which the listed values were obtained:
a. In general, the values were measured using a PPC405GPr Evaluation Board with four PCI devices, an external bus master on the
peripheral bus, and external wrap-back on the Ethernet port. For all CPU clock rates, PLB = 133.3MHz, OPB = PerClk = 66.6MHz,
PCI = SysClk = 33.3MHz.
b. Typical current and power are characterized at V
DD
= +1.8V, OV
DD
= +3.3V, and T
C
= +36
°
C while running various applications
under the Linux operating system.
c. Maximum current and power are characterized at V
DD
= +1.9V, OV
DD
= +3.6V, and T
C
= +85
°
C while running applications designed
to maximize CPU power consumption. An external PCI master heavily loads the PCI bus with transfers targeting SDRAM while the
internal DMA controller further increases SDRAM bus traffic.
2. AV
DD
should be derived from V
DD
using the following circuit:
V
DD
C1
C2
C3
AV
DD
L1
L1 – 2.2
μ
H SMT inductor (equivalent to MuRata
LQH3C2R2M34) or SMT chip ferrite bead (equivalent
to MuRata BLM31A700S)
C1 – 3.3
μ
F SMT tantalum
C2 –
0.1
μ
F SMT monolithic ceramic capacitor with X7R
dielectric or equivalent
C3 – 0.01
μ
F SMT monolithic ceramic capacitor with X7R
dielectric or equivalent
+
AGND
GND
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