參數(shù)資料
型號: PPC405GPR-3BB266Z
廠商: APPLIEDMICRO INC
元件分類: 微控制器/微處理器
英文描述: Power PC 405GPr Embedded Processor
中文描述: 32-BIT, 266.66 MHz, RISC PROCESSOR, PBGA456
封裝: 35 X 35 MM, PLASTIC, EBGA-456
文件頁數(shù): 49/57頁
文件大?。?/td> 614K
代理商: PPC405GPR-3BB266Z
405GPr – Power PC 405GPr Embedded Processor
AMCC
49
Revision 2.04 – September 7, 2007
Data Sheet
Trace
[TS1E]
[TS2E]
[TS1O]
[TS2O]
[TS3]
[TS4]
[TS5]
[TS6]
na
na
PT
C
/2+0.7
PT
C
/2-0.5
10.3
7.1
TrcClk
10pF load
on
clk/data
I/O Specifications—Group 1
(Sheet 3 of 3)
Notes:
1.
PCI timings are for operation up to 66.66MHz. PCI output hold time requirement is 1ns for 66.66MHz and 2ns for 33.33MHz.
In synchronous mode, timing is relative to SysClk. In asynchronous mode, timing is relative to PCIClk.
2. Ethernet interface meets timing requirements as defined by IEEE 802.3 standard.
3. For PCI, I/O H is specified at 0.9OV
DD
and I/O L is specified at 0.1OV
DD
. For all other interfaces, I/O H is specified at 2.4 V
and I/O L is specified at 0.4 V.
Signal
Input (ns)
Output (ns)
Output Current (mA)
I/O H
(min)
Clock
Notes
Setup Time
(T
IS
min)
Hold Time
(T
IH
min)
Valid Delay
(T
OV
max)
Hold Time
(T
OH
min)
I/O L
(min)
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