參數(shù)資料
型號(hào): PPC405GPR-3BB266Z
廠商: APPLIEDMICRO INC
元件分類(lèi): 微控制器/微處理器
英文描述: Power PC 405GPr Embedded Processor
中文描述: 32-BIT, 266.66 MHz, RISC PROCESSOR, PBGA456
封裝: 35 X 35 MM, PLASTIC, EBGA-456
文件頁(yè)數(shù): 28/57頁(yè)
文件大?。?/td> 614K
代理商: PPC405GPR-3BB266Z
405GPr – Power PC 405GPr Embedded Processor
28
AMCC
Revision 2.04 – September 7, 2007
Data Sheet
Signal List
The following table provides a summary of the number of package pins associated with each functional interface
group.
Multiplexed Pins
In the table “Signal Functional Description” on page 30, each external signal is listed along with a description of the
signal function. Some signals are multiplexed on the same pin (ball) so that the pin can be used for different
functions. Multiplexed signals are shown as a default signal with a secondary signal in square brackets (for
example, GPIO1[TS1E]). Active-low signals (for example, RAS) are marked with an overline.
It is expected that in any single application a particular pin will always be programmed to serve the same function.
The flexibility of multiplexing allows a single chip to offer a richer pin selection than would otherwise be possible.
In addition to multiplexing, many pins are also multi-purpose. For example, the EBC peripheral controller address
pins are used as outputs by the PPC405GPr to broadcast an address to external slave devices when the
PPC405GPr has control of the external bus. When, during the course of normal chip operation, an external master
gains ownership of the external bus, these same pins are used as inputs which are driven by the external master
and received by the EBC in the PPC405GPr. In this example, the pins are also bidirectional, serving as both inputs
and outputs.
Intialization Strapping
One group of pins is used as strapped inputs during system reset. These pins function as strapped inputs only
during reset and are used for other functions during normal operation (see “Strapping” on page 51). Note that the
use of these pins for strapping is not considered multiplexing since the strapping function is not programmable.
Pin Summary
Group
PCI
Ethernet
SDRAM
No. of Pins
60
18
71
96
9
15
7
5
18
299
External peripheral
External master
Internal peripheral
Interrupts
JTAG
System
Total Signal Pins
OV
DD
V
DD
Gnd
Thermal (and Gnd)
Reserved
Total Pins
32
24
59
36
6
456
相關(guān)PDF資料
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
PPC405GPR-3BB333 制造商:AppliedMicro 功能描述:MPU 405GPr RISC 32-Bit 0.18um 333MHz 3.3V 456-Pin EBGA Tray
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PPC405GPR-3BB400 制造商:AppliedMicro 功能描述:MPU 405GPr RISC 32-Bit 0.18um 400MHz 3.3V 456-Pin EBGA Tray 制造商:AMCC 功能描述:MPU 405GPR RISC 32BIT 0.18UM 400MHZ 3.3V 456PIN EBGA - Trays 制造商:AMCC 功能描述:AMCPPC405GPR-3BB400 CPU PERFORMANCESRAM
PPC405GPR-3BB400Z 制造商:AppliedMicro 功能描述:MPU 405GPr RISC 32-Bit 0.18um 400MHz 3.3V 456-Pin EBGA T/R 制造商:AMCC 功能描述:AMCPPC405GPR-3BB400Z CPU EOL090410
PPC405GPR-3DB266 制造商:AppliedMicro 功能描述:MPU 405GPr RISC 32-Bit 0.18um 266MHz 3.3V 456-Pin EBGA Tray