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參數(shù)資料
| 型號： | PowerPC 604 |
| 廠商： | Motorola, Inc. |
| 英文描述： | 32-Bit Microprocessor(32位微處理器) |
| 中文描述： | 32位微處理器（32位微處理器） |
| 文件頁數(shù)： | 5/7頁 |
| 文件大?。?/td> | 203K |
| 代理商： | POWERPC 604 |
.01
.1
1
5
10
20
50
80
99
99.9
99.99
200
103
2000
5000
500
104
102
0 to 100
°
C, Caulfied et al. (1993)
20 to 80
°
C, Gerke (1994)
20000
50000
105
25 to 55
°
C, projection
25 to 45
°
C, projection
Cummulative
Package
Failures, %
Number of Cycles
2.2 X
3.2 X
Figure 6.
CBGA fatigue life distribution (log-normal) for a 25mm substrate air-to-air temperature cycled from 20
°
C-80
°
C and
compared to predictions made for two temperature cycle conditions using Equation 1.
The purpose of accelerated-temperature-cycle testing is
to compare the mechanical and the electrical robustness of
the assembly when subjected to a thermal cyclical
environment. Correlation to the accelerated temperature
cycle testing and actual field use can be made by use of
daisy-chain test vehicles and the application of a modified
Coffin-Manson relationship. Acceleration factors can be
calculated to predict field-life cycles from the accelerated-
stress test.
The version of the Coffin-Manson equation typically
used for CBGA's has been detailed previously by
Caulfield, et al. (1993]. For solder interconnections of a
fixed geometry, the strain term can be reduced to a delta
temperature term,
T, which comprises each thermal cycle
as illustrated in Equation 1.
AF = [
Tl/
Tf]1.9(ff/fl)1/3exp[1414(1/Tmaxf - 1/Tmaxl)] (1)
The acceleration factor (AF) is simply a multiplier
applied to a known set of data to predict the failure rate of
the condition. In the case of 25
°
C-55
°
C and 20
°
C-80
°
C,
the AF (or multiplier) is 2.2X (assumptions for this
calculation will be presented in a later sub-section). In
other words, the fatigue life of the smaller
T is 2.2X
times longer than the 20
°
C-80
°
C case. Typically, the 50%
fail value is applied to the AF factor to translate between
failure distributions (Figure 6).
CBGA Solder Fatigue Life Projections.
Predictions for
typical computer applications were projected by using
accelerated test data and the method described as follows:
a) failure distributions, such as those from Figure 6 were
extrapolated down to the 0.01% (100ppm) and 0.1%
(1000ppm) levels, b) the number of cycles to failure at
those levels were noted, c) the number of cycles was then
multiplied by an acceleration factor (Equation 1) for the
temperature range of interest.
The fatigue life estimates described above are generally
thought to be very conservative for the solder joints
studied. The assumptions are: 1) on the average, the system
would be turned on and off up to 6 times per day [Coffin-
Manson 24 hour period] and 2) the system would be cycled
over the full thermal excursion each and every time the
system was turned on.
The maximum solder fatigue damage frequency that can
be applied for most desktop office environment operating
temperatures is 1 on-off cycle every 4 hours (i.e., 6 per 24
hours). This is due to the solder requiring time to stress
relax at both temperature extremes (full on and full off)
generated in the office environment. During the course of
an average work day, which is generally considered to be 8
to 10 hours long it is probable then to accumulate
maximum fatigue damage by having 2 evenly spaced on-
off cycles. Cycles occurring more frequently do not
accumulate as much damage per cycle as the above
described situation. More frequent cycling, while higher in
total number of cycles, do not necessarily accumulate more
solder fatigue damage than a low number of long cycles.
Therefore, laptop machines and mini-power cycles are not
generally considered to be as harmful to the solder joints
when being compared to a low number of slow on-off
cycles.
The above method was utilized to make predictions for
the PowerPC microprocessor product CBGA packages
21mm and 25mm (used to estimate the 21x25mm CBGA
solder fatigue life) for the PowerPC 603 and PowerPC 604
microprocessors and the MPC105; respectively. These
predictions are shown in Figure 7. The assumptions used
for Figure 7 were calculated to be consistent with IPC-SM-
785. Failure rates of 100ppm are plotted and failure rates
of 1000ppm can be easily be calculated by multiplying the
100ppm number of cycles by 1.3.
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