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參數(shù)資料
| 型號(hào)： | PM7367-PI |
| 廠商： | PMC-SIERRA INC |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | DIODE 1N4002 RECTIFYING |
| 中文描述： | DATACOM, FRAMER, PBGA272 |
| 封裝： | 27 X 27 MM, 2.33 MM HEIGHT, PLASTIC, BGA-272 |
| 文件頁(yè)數(shù)： | 50/323頁(yè) |
| 文件大小： | 2429K |
| 代理商： | PM7367-PI |
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DATA SHEET
PM7367 FREEDM-32P32
ISSUE 2
PMC-1991499
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE
36
is detected. The reader then informs the roamer that a transaction is consumed.
The roamer updates its transaction count and clears the non-zero transaction
count flag if required. The roamer then services the next channel with its
transaction flag set high.
The writer and reader determine empty and full FIFO conditions using flags.
Each block in the partial packet buffer has an associated flag. The writer sets
the flag after the block is written and the reader clears the flag after the block is
read. The flags are initialized (cleared) when the block pointers are written using
indirect block writes. The writer declares a channel FIFO overrun whenever the
writer tries to store data to a block with a set flag. In order to support optional
removal of the FCS from the packet data, the writer does not declare a block as
filled (set the block flag nor increment the transaction count) until the first double
word of the next block in channel FIFO is filled. If the end of a packet resides in
the first double word, the writer declares both blocks as full at the same time.
When the reader finishes processing a transaction, it examines the first double
word of the next block for the end-of-packet flag. If the first double word of the
next block contains only FCS bytes, the reader would, optionally, process next
transaction (end-of-packet) and consume the block, as it contains information not
transferred to the RMAC block.
8.4 Receive DMA Controller
The Receive DMA Controller block (RMAC) is a DMA controller which stores
received packet data in host computer memory. The RMAC is not directly
connected to the host memory PCI bus. Memory accesses are serviced by a
downstream PCI controller block (GPIC). The RMAC and the host exchange
information using receive packet descriptors (RPDs). The descriptor contains
the size and location of buffers in host memory and the packet status information
associated with the data in each buffer. RPDs are transferred from the RMAC to
the host and vice versa using descriptor reference queues. The RMAC
maintains all the pointers for the operation of the queues. The RMAC provides
two receive packet descriptor reference (RPDR) free queues to support small
and large buffers. The RMAC acquires free buffers by reading RPDRs from the
free queues. After a packet is received, the RMAC places the associated RPDR
onto a RPDR ready queue. To minimise host bus accesses, the RMAC
maintains a descriptor reference table to store current DMA information. This
table contains separate DMA information entries for up to 32 receive channels.
8.4.1 Data Structures
For packet data, the RMAC communicates with the host using Receive Packet
Descriptors (RPD), Receive Packet Descriptor References (RPDR), the Receive
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PDF描述 |
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| PM7367 | 32 link, 32 Channel Data Link Manager with PCI Interface |
| PM7375 | ATM SAR and PHY Processor for PCI Bus |
| PM7375-SC | LOCAL ATM SAR & PHYSICAL LAYER |
| PM7380 | FRAME ENGINE AND DATA LINK MANAGER 32P672 |
| PM7380-PI | FRAME ENGINE AND DATA LINK MANAGER 32P672 |
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| PM7375 | 制造商:PMC 制造商全稱:PMC 功能描述:LOCAL ATM SAR & PHYSICAL LAYER |
| PM7375-SC | 制造商:PMC Sierra from Components Direct 功能描述:PMC-SIERRA PM7375-SC COMMUNICATION MISC - Trays 制造商:PMC-Sierra 功能描述:PMC-Sierra PM7375-SC Communication Misc |
| PM7375-SGC | 制造商:PMC Sierra from Components Direct 功能描述:PM7375-SGC - Trays 制造商:PMC-Sierra 功能描述:PMC-Sierra PM7375-SGC Communication Misc |
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