
DATA SHEET
PM7367 FREEDM-32P32
ISSUE 2
PMC-1991499
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE
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LIST OF FIGURES
FIGURE 1 – HDLC FRAME...............................................................................30
FIGURE 2 – CRC GENERATOR.......................................................................31
FIGURE 3 – PARTIAL PACKET BUFFER STRUCTURE..................................35
FIGURE 4 – RECEIVE PACKET DESCRIPTOR...............................................37
FIGURE 5 – RECEIVE PACKET DESCRIPTOR TABLE...................................40
FIGURE 6 – RPDRF AND RPDRR QUEUES ...................................................42
FIGURE 7 – RPDRR QUEUE OPERATION......................................................44
FIGURE 8 – RECEIVE CHANNEL DESCRIPTOR REFERENCE TABLE.........45
FIGURE 9 – GPIC ADDRESS MAP ..................................................................52
FIGURE 10 – TRANSMIT DESCRIPTOR .........................................................54
FIGURE 11 – TRANSMIT DESCRIPTOR TABLE .............................................58
FIGURE 12 – TDRR AND TDRF QUEUES.......................................................60
FIGURE 13 – TRANSMIT CHANNEL DESCRIPTOR REFERENCE TABLE ....62
FIGURE 14 – TD LINKING................................................................................65
FIGURE 15 – PARTIAL PACKET BUFFER STRUCTURE................................69
FIGURE 16 – INPUT OBSERVATION CELL (IN_CELL).................................274
FIGURE 17 – OUTPUT CELL (OUT_CELL) ...................................................275
FIGURE 18 – BI-DIRECTIONAL CELL (IO_CELL) .........................................275
FIGURE 19 – LAYOUT OF OUTPUT ENABLE AND BI-DIRECTIONAL CELLS
..............................................................................................................276
FIGURE 20 – BOUNDARY SCAN ARCHITECTURE......................................278
FIGURE 21 – TAP CONTROLLER FINITE STATE MACHINE........................280
FIGURE 22 – UNCHANNELISED RECEIVE LINK TIMING............................284