DATA SHEET
PM7367 FREEDM-32P32
ISSUE 2
PMC-1991499
FRAME ENGINE AND DATA LINK MANAGER
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMER’S INTERNAL USE
185
Register 0x314 : TMAC Queue Base MSW
Bit
Type
Function
Default
Bit 31
to
Bit 16
Unused
XXXXH
Bit 15
R/W
TQB[31]
0
Bit 14
R/W
TQB[30]
0
Bit 13
R/W
TQB[29]
0
Bit 12
R/W
TQB[28]
0
Bit 11
R/W
TQB[27]
0
Bit 10
R/W
TQB[26]
0
Bit 9
R/W
TQB[25]
0
Bit 8
R/W
TQB[24]
0
Bit 7
R/W
TQB[23]
0
Bit 6
R/W
TQB[22]
0
Bit 5
R/W
TQB[21]
0
Bit 4
R/W
TQB[20]
0
Bit 3
R/W
TQB[19]
0
Bit 2
R/W
TQB[18]
0
Bit 1
R/W
TQB[17]
0
Bit 0
R/W
TQB[16]
0
This register provides the more significant word of the Transmit Queue Base
address. The contents of the companion TMAC Transmit Descriptor Table Base
LSW register is held in a holding register until a write access to this register, at
which point, the base address of the transmit queue is updated.
Note
This register is not byte addressable. Writing to this register modifies all the bits
in the register. Byte selection using byte enable signals (CBEB[3:0]) are not
implemented. However, when all four byte enables are negated, no access is
made to this register.