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S/UNI-JET Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
Document ID: PMC-1990267, Issue 3
145
Register 33AH: E3 FRMR Framing Interrupt Enable
Bit
Type
Function
Default
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
Unused
X
Bit 4
R/W
CZDE
0
Bit 3
R/W
LOSE
0
Bit 2
R/W
LCVE
0
Bit 1
R/W
COFAE
0
Bit 0
R/W
OOFE
0
OOFE
The OOFE bit is an interrupt enable. When OOFE is logic one, a change of state of the OOF
status generates an interrupt and sets the INTB output to logic zero. When OOFE is logic
zero, changes of state of the OOF status are disabled from causing interrupts on the INTB
output.
COFAE
The COFAE bit is an interrupt enable. When COFAE is logic one, a change of frame
alignment generates an interrupt and sets the INTB output to logic zero. When COFAE is
logic zero, changes of frame alignment are disabled from causing interrupts on the INTB
output.
LCVE
The LCVE bit is an interrupt enable. When LCVE is logic one, detection of a LCV generates
an interrupt and sets the INTB output to logic zero. When LCVE is logic zero, occurrences of
LCV are disabled from causing interrupts on the INTB output.
LOSE
The LOSE bit is an interrupt enable. When LOSE is logic one, a change of state of the loss-
of-signal generates an interrupt and sets the INTB output to logic zero. When LOSE is logic
zero, occurrences of loss-of-signal are disabled from causing interrupts on the INTB output.
CZDE
The CZDE bit is an interrupt enable. When CZDE is logic one, detection of four consecutive
zeros in the HDB3-encoded stream generates an interrupt and sets the INTB output to logic
zero. When CZDE is logic zero, occurrences of consecutive zeros are disabled from causing
interrupts on the INTB output.