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PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7340 S/UNI-IMA-8
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
51
Figure 9
- Inverse Multiplexing
Physical Link #1
Physical Link #0
IMA Group
IMA Group
IMA VirtualLInk
PHY
PHY
PHY
Original Cell stream
passed to ATM Layer
PHY
PHY
Physical Link #2
Single ATM Cell Stream
from ATM Layer
PHY
Tx direction cells distributed across links in round robin sequence
Rx direction cells recombined into single ATM stream
10.2.2 IDCC scheduler
The IMA Data Cell Clock (IDCC) scheduler calculates the IMA Data Cell Rate
(IDCR) for each group that is used by both the Receive and the Transmit IMA
processors. There is one scheduler for each direction (TXIDCC and RXIDCC),
and each scheduler can monitor the rate of up to 8 reference clocks; each
scheduler can also generate up to 8 IDCC clocks based upon IDCR. For each
group, the reference link can be selected to be one of the 8 monitored links. Each
of the monitored links can only be the reference link for one group. IDCR is
calculated using the following equation, with N
on
and M set independently for
each IDCR generator. N
on
is the number of active links, M is the size of the IMA
frame, and TRL Cell Rate (TRLCR) is the cell rate of the reference link.
IDCR = N
on
X TRLCR X (M-1/M) X (2048/2049)
TRLCR is generated from the byte rate. The byte rate is obtained by monitoring
the data transfers on the internal bus in the TC layer.
For each IDCR clock tick, a service request is generated and placed into a rate
based FIFO. Since there may be many requests generated in a short amount of
time and the rate at which each request is generated may be different, a method
is required to arbitrate between the requests to prevent blocking of high rate