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PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7340 S/UNI-IMA-8
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
144
Register 0x182: TCAS Indirect Channel Data
Bit
Type
Function
Default
15:9
Unused
X
8
R/W
PROV
0
7:3
Unused
X
2:0
R/W
VLINK[2:0]
0
This register contains either: (1) the data read from the timeslot provision RAM
after an indirect read operation or (2) the data to be inserted into the timeslot
provision RAM in an indirect write operation.
The timeslot provision ram maps either timeslots from the physical links or entire
physical links to a virtual link number (VLINK). It also provisions timeslots/links
VLINK[2:0]
The indirect data bits (VLINK[2:0]) report the channel number read from the
timeslot provision RAM after an indirect read operation has been completed.
The channel number to be written to the timeslot provision RAM in an indirect
write operation must be set up in this register before triggering the write.
VLINK[2:0] reflects the last value either read or written until the completion of
a subsequent indirect read operation.
PROV
The indirect provision enable bit (PROV) reports the timeslot provision enable
flag read from the timeslot provision RAM after an indirect read operation has
been completed. The provision enable flag to be written to the timeslot
provision RAM in an indirect write operation must be set up in this register
before triggering the write. When PROV is set high, the current time-slot is
assigned to the virtual link as indicated by VLINK[2:0]. When PROV is set low,
the time-slot does not belong to any virtual link. The transmit link data is set to
the contents of the Idle Time-slot Fill Data register. PROV reflects the last
value read or written until the completion of a subsequent indirect read
operation.