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PRELIMINARY
INVERSE MULTIPLEXING OVER ATM
PM7340 S/UNI-IMA-8
DATA SHEET
PMC-2001723
ISSUE 3
INVERSE MULTIPLEXING OVER ATM
PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND FOR ITS CUSTOMERS’ INTERNAL USE
261
12.3.2 Configuring TC layer Options
TC layer options in the transmit direction include scrambling and HEC
generations. Scrambling should be set as required by the physical layer.
TC layer options in the receive direction include descrambling, and interrupt
reporting and error handling options. To properly support IMA applications, the
TC layer functions should not filter out errored cells but pass them to the IMA-
LAYER and let the IMA-LAYER filter them out. The options LCDOCDPASS,
HCSPASS and UNASSPASS should be set for IMA applications. If these options
are set for TC links, only the unassigned cells will not be filtered by the IMA-
LAYER.
When running IMA, there should never be any idle cells. If idle cells exist on an
IMA link, it depends upon where the idle cells were inserted whether IDLEPASS
is desired to be set. If the idle cells were incorrectly inserted by the TC layer,
correct operation could be preserved in the face of errors if IDLEPASS is not set.
If the idle cells are inserted by the link layer, correct operation may be perserved
by setting IDLEPASS.
The configuration options are programmed one link at a time by following the
steps below:
RTTC/TTTC Programming Steps:
1. For each write access, wait until the LBUSY bit in the RTTC/TTTC
Indirect Status Register is clear. Note that the LBUSY bit might not be
ready for up to 86 REFCLK cycle after an access.
2. Once the BUSY bit is clear, write to the RTTC/TTTC Link Data
Register to specifiy the desired configuration options for that link.
3. Next, write into the RTTC/TTTC Indirect Status register specifying
the SPE and LINK that is about to be configured and whether this is to
be a write or a read access, by clearing or setting the LWRB bit in this
register.
12.3.3 UTOPIA Interface Configuration
There is very little setup required to configure the Any-PHY/UTOPIA Interface.
For typical operation, the following registers need to be written to select the mode