
Mar. 2001
10%
90%
trr
Irr
tr
td (on)
tc (on)
tc (off)
td (off)
I
CIN
Vce
10%
90%
tf
ton= td (on) + tr
toff= td (off) + tf
V
D
(all)U,V,W,(N)
P,(U,V,W)
A
Pulse
V
CC
I
CIN
I
CIN
V
D
(all)U,V,W,(N)
P,(U,V,W)
V
CC
I
C
I
C
I
C
OC
SC
I
CIN
toff (OC)
toff (OC)
U,V,W
Snubber
N
I
CINN
I
CINP
V
D
V
D
P
I
C
V
CC
I
CINN
0A
0A
I
CINP
t
t
t
dead
t
dead
t
dead
P, (U,V,W,B)
U,V,W, (N)
U,V,W,(N)
V
D
(all)
V
D
(all)
I
CIN
Ic
V
V
P,(U,V,W)
all open
P
N
N
U,V,W
V
CC
V
CC
I
C
I
C
I
C
V
D
(all)
V
D
(all)
P
U,V,W
I
CIN
I
CIN
Short Circuit
Over Current
Constant Current
Constant Current
Fig. 5 OC and SC Test
Fig. 6 OCand SCTestwaveform
Fig. 7 Dead time measurement point example
Fig. 3 Switching time Test circuit and waveform
Fig.1 V
CE(sat)
Test
Fig.2 V
EC
Test
a) Lower Arm Switching
Signal input
(Upper Arm)
Signal input
(Lower Arm)
Signal input
(Upper Arm)
Signal input
(Lower Arm)
b) Upper Arm Switching
Fig.4 I
CES
Test
Signal input
Signal input
–
Ic
PRECAUTIONS FOR TESTING
1. Before appling any control supply voltage (V
D
), the input signals should be turned on from its off state.
After this, the specified ON and OFF level setting for each input signal should be done.
2. When performing
“
OC
”
and
“
SC
”
tests, the turn-off surge voltage spike at the corresponding protection operation should not
be allowed to rise above V
CES
rating of the device.
(These test should not be done by using a curve tracer or its equivalent.)
MITSUBISHI SEMICONDUCTOR <INTELLIGENT POWER MODULES>
PM50CTJ060-3
INSULATED PACKAGE
FLAT-BASE TYPE