參數(shù)資料
型號: PIC18F87K90T-I/PT
廠商: Microchip Technology
文件頁數(shù): 19/110頁
文件大小: 0K
描述: IC MCU 8BIT 128KB FLASH 80TQFP
標(biāo)準(zhǔn)包裝: 1,200
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 64MHz
連通性: I²C,LIN,SPI,UART/USART
外圍設(shè)備: 欠壓檢測/復(fù)位,LCD,POR,PWM,WDT
輸入/輸出數(shù): 69
程序存儲器容量: 128KB(64K x 16)
程序存儲器類型: 閃存
EEPROM 大?。?/td> 1K x 8
RAM 容量: 4K x 8
電壓 - 電源 (Vcc/Vdd): 1.8 V ~ 5.5 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 24x12b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 80-TQFP
包裝: 帶卷 (TR)
PIC18F47J53 FAMILY
DS39964B-page 466
Preliminary
2010 Microchip Technology Inc.
ADDWFC
ADD W and Carry bit to f
Syntax:
ADDWFC
f {,d {,a}}
Operands:
0
f 255
d
[0,1]
a
[0,1]
Operation:
(W) + (f) + (C)
dest
Status Affected:
N,OV, C, DC, Z
Encoding:
0010
00da
ffff
Description:
Add W, the Carry flag and data memory
location ‘f’. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
placed in data memory location ‘f’.
If ‘a(chǎn)’ is ‘0’, the Access Bank is selected.
If ‘a(chǎn)’ is ‘1’, the BSR is used to select the
GPR bank (default).
If ‘a(chǎn)’ is ‘0’ and the extended instruction
set is enabled, this instruction operates
in Indexed Literal Offset Addressing
mode whenever f
95 (5Fh). See
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read
register ‘f’
Process
Data
Write to
destination
Example:
ADDWFC
REG, 0, 1
Before Instruction
Carry bit =
1
REG
=
02h
W=
4Dh
After Instruction
Carry bit =
0
REG
=
02h
W
=
50h
ANDLW
AND Literal with W
Syntax:
ANDLW
k
Operands:
0
k 255
Operation:
(W) .AND. k
W
Status Affected:
N, Z
Encoding:
0000
1011
kkkk
Description:
The contents of W are ANDed with the
8-bit literal ‘k’. The result is placed in W.
Words:
1
Cycles:
1
Q Cycle Activity:
Q1
Q2
Q3
Q4
Decode
Read literal
‘k’
Process
Data
Write to
W
Example:
ANDLW
05Fh
Before Instruction
W=
A3h
After Instruction
W
=
03h
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