2007 Microchip Technology Inc.
Preliminary
DS39755B-page 381
PIC18F2423/2523/4423/4523
SETF (Indexed Literal Offset Mode) ........................319
SLEEP .....................................................................306
Standard Instructions ...............................................271
SUBFWB ..................................................................306
SUBLW ....................................................................307
SUBWF ....................................................................307
SUBWFB ..................................................................308
Summary ..................................................................271
SWAPF ....................................................................308
TBLRD .....................................................................309
TBLWT .....................................................................310
TSTFSZ ...................................................................311
XORLW ....................................................................311
XORWF ....................................................................312
INTCON Registers .......................................................93–95
Inter-Integrated Circuit.
See
I
2
C.
Internal Oscillator Block .....................................................26
Adjustment .................................................................26
INTIO Modes ..............................................................26
INTOSC Frequency Drift ............................................26
INTOSC Output Frequency ........................................26
OSCTUNE Register ...................................................26
PLL in INTOSC Modes ..............................................26
Internal RC Oscillator
Use with WDT ..........................................................262
Internet Address ...............................................................387
Interrupt Sources .............................................................253
A/D Conversion Complete .......................................231
Interrupt-on-Change (RB7:RB4) ..............................108
INTn Pin ...................................................................103
PORTB, Interrupt-on-Change ..................................103
TMR0 .......................................................................103
TMR1 Overflow ........................................................127
TMR2 to PR2 Match (PWM) ............................144, 149
TMR3 Overflow ........................................................135
Interrupts ............................................................................91
Interrupts, Flag Bits
Interrupt-on-Change (RB7:RB4) Flag
(RBIF Bit) .........................................................108
INTOSC, INTRC.
See
Internal Oscillator Block.
IORLW .............................................................................294
IORWF .............................................................................294
IPR Registers ...................................................................100
L
LFSR ................................................................................295
Low-Voltage ICSP Programming.
See
Single-Supply
ICSP Programming.
M
Master Clear (MCLR) .........................................................43
Master Synchronous Serial Port (MSSP).
See
MSSP.
Memory Organization .........................................................53
Data Memory .............................................................59
Program Memory .......................................................53
Memory Programming Requirements ..............................339
Microchip Internet Web Site .............................................387
Migration from Baseline to
Enhanced Devices ...................................................374
Migration from High-End to
Enhanced Devices ...................................................375
Migration from Mid-Range to
Enhanced Devices ...................................................375
MOVF ...............................................................................295
MOVFF ............................................................................296
MOVLB ............................................................................ 296
MOVLW ........................................................................... 297
MOVSF ............................................................................ 315
MOVSS ............................................................................ 316
MOVWF ........................................................................... 297
MPLAB ASM30 Assembler, Linker, Librarian .................. 322
MPLAB ICD 2 In-Circuit Debugger .................................. 323
MPLAB ICE 2000 High-Performance Universal
In-Circuit Emulator ................................................... 323
MPLAB ICE 4000 High-Performance Universal
In-Circuit Emulator ................................................... 323
MPLAB Integrated Development
Environment Software ............................................. 321
MPLAB PM3 Device Programmer ................................... 323
MPLINK Object Linker/MPLIB Object Librarian ............... 322
MSSP
ACK Pulse ....................................................... 175, 177
Control Registers (general) ..................................... 161
I
2
C Mode.
See
I
2
C Mode.
Module Overview ..................................................... 161
SPI Master/Slave Connection .................................. 165
SPI Mode.
See
SPI Mode.
SSPBUF Register .................................................... 166
SSPSR Register ...................................................... 166
MULLW ............................................................................ 298
MULWF ............................................................................ 298
N
NEGF ............................................................................... 299
NOP ................................................................................. 299
O
Oscillator Configuration ..................................................... 23
EC .............................................................................. 23
ECIO .......................................................................... 23
HS .............................................................................. 23
HSPLL ....................................................................... 23
Internal Oscillator Block ............................................. 26
INTIO1 ....................................................................... 23
INTIO2 ....................................................................... 23
LP .............................................................................. 23
RC ............................................................................. 23
RCIO .......................................................................... 23
XT .............................................................................. 23
Oscillator Selection .......................................................... 253
Oscillator Start-up Timer (OST) ................................... 31, 45
Oscillator Switching ........................................................... 28
Oscillator Transitions ......................................................... 29
Oscillator, Timer1 ..................................................... 127, 137
Oscillator, Timer3 ............................................................. 135
P
Packaging Information ..................................................... 365
Details (Diagrams) ................................................... 367
Marking .................................................................... 365
Parallel Slave Port (PSP) ......................................... 114, 120
Associated Registers ............................................... 121
CS (Chip Select) ...................................................... 120
PORTD .................................................................... 120
RD (Read Input) ...................................................... 120
Select (PSPMODE Bit) .................................... 114, 120
WR (Write Input) ...................................................... 120
PICSTART Plus Development Programmer .................... 324
PIE Registers ..................................................................... 98