參數(shù)資料
型號: PIC18F44J50-I/ML
廠商: Microchip Technology
文件頁數(shù): 27/32頁
文件大?。?/td> 0K
描述: IC PIC MCU FLASH 16K 2V 44-QFN
產(chǎn)品培訓(xùn)模塊: XLP Deep Sleep Mode
PIC18 J Series MCU Overview
8-bit PIC® Microcontroller Portfolio
標(biāo)準(zhǔn)包裝: 45
系列: PIC® XLP™ 18F
核心處理器: PIC
芯體尺寸: 8-位
速度: 48MHz
連通性: I²C,SPI,UART/USART,USB
外圍設(shè)備: 欠壓檢測/復(fù)位,DMA,POR,PWM,WDT
輸入/輸出數(shù): 34
程序存儲器容量: 16KB(8K x 16)
程序存儲器類型: 閃存
RAM 容量: 3.8K x 8
電壓 - 電源 (Vcc/Vdd): 2.15 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 13x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 44-VQFN 裸露焊盤
包裝: 管件
產(chǎn)品目錄頁面: 656 (CN2011-ZH PDF)
配用: AC164322-ND - MODULE SOCKET MPLAB PM3 28/44QFN
PIC18F2XJXX/4XJXX FAMILY
DS39687E-page 4
2009 Microchip Technology Inc.
2.1.1
PIC18F2XJXX/4XJXX/
LF2XJXX/LF4XJXX DEVICES AND
THE ON-CHIP VOLTAGE
REGULATOR
PIC18FXXJXX devices have an internal core voltage
regulator. On these devices (“PIC18F” in the part num-
ber), the regulator is always enabled. The regulator
input is taken from the microcontroller VDD pins. The
output of the regulator is supplied to the VDDCORE/VCAP
pin. On these devices, this pin simultaneously serves
as both the regulator output and the microcontroller
core power input pin. For these devices, the
VDDCORE/VCAP pin should be tied to a capacitor and
nothing else.
PIC18LFXXJXX devices do not have an internal core
voltage regulator. On these devices (“PIC18LF” in the
part number), power must be externally supplied to
both VDD and VDDCORE/VCAP.
Whether or not the regulator is used, it is always good
design practice to have sufficient capacitance on all
supply pins. Examples are shown in Figure 2-3.
The specifications for core voltage and capacitance are
FIGURE 2-3:
CONNECTIONS FOR THE
ON-CHIP REGULATOR
2.2
Memory Maps
The PIC18F2XJXX/4XJXX family of devices offers
program memory sizes of 16, 32, 64 and 128 Kbytes.
The memory sizes for different members of the family
are shown in Table 2-2. The overall memory maps for
all the devices are shown in Figure 2-4.
TABLE 2-2:
PROGRAM MEMORY SIZES
FOR PIC18F2XJXX/4XJXX
FAMILY DEVICES
For purposes of code protection, the program memory
for every device is treated as a single block. Enabling
code protection, thus protects the entire code memory,
and not individual segments.
2.5V
VDD
VDDCORE/VCAP
VSS
2.5V
VDD
VDDCORE/VCAP
VSS
3.3V
(VDD
= VDDCORE)
(VDD
≥ VDDCORE)
PIC18F2XJXX/4XJXX Devices (Regulator Enabled)
PIC18F2XJXX/4XJXX
PIC18LF2XJXX/4XJXX Devices (Regulator Disabled)
VDD
VDDCORE/VCAP
VSS
CF
3.3V
PIC18LF2XJXX/4XJXX
Device*
Program
Memory
(Kbytes)
Location of Flash
Configuration
Words
PIC18F24J10
16
3FF8h:3FFFh
PIC18F44J10
PIC18F24J11
PIC18F44J11
PIC18F24J50
PIC18F44J50
PIC18F25J10
32
7FF8h:7FFFh
PIC18F45J10
PIC18F25J11
PIC18F45J11
PIC18F25J50
PIC18F45J50
PIC18F26J11
64
FFF8h:FFFFh
PIC18F46J11
PIC18F26J13
PIC18F46J13
PIC18F26J50
PIC18F46J50
PIC18F26J53
PIC18F46J53
PIC18F27J13
128
1FFF8h:1FFFFh
PIC18F47J13
PIC18F27J53
PIC18F47J53
*
Includes PIC18F and PIC18LF devices.
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