參數(shù)資料
型號(hào): PIC16CR620A
廠商: Microchip Technology Inc.
元件分類(lèi): 8位微控制器
英文描述: EPROM-Based 8-Bit CMOS Microcontroller
中文描述: 存儲(chǔ)器為基礎(chǔ)的8位CMOS微控制器
文件頁(yè)數(shù): 83/108頁(yè)
文件大?。?/td> 645K
代理商: PIC16CR620A
1998 Microchip Technology Inc.
Preliminary
DS30235G-page 83
PIC16C62X
12.3 DC CHARACTERISTICS: PIC16C62XA/CR62XA-04 (Commercial, Industrial, Extended)
PIC16C62XA/CR62XA-20 (Commercial, Industrial, Extended)
PIC16LC62XA/LCR62XA-04 (Commercial, Industrial)
PIC16LC62XA/LCR62XA-20 (Commercial, Industrial)
Standard Operating Conditions (unless otherwise stated)
Operating temperature
–40
°
C
0
°
C
T
A
+70
°
C for commercial and
–40
°
C
Characteristic
T
A
+85
°
C for industrial and
T
A
+125
°
C for extended
Min
Typ Max Units
Param
No.
Sym
Conditions
D001
D001A
D002
V
DD
Supply Voltage
3.0
4.5
-
-
5.5
5.5
V
V
V
XT, RC and LP osc configuration
HS osc configuration
Device in SLEEP mode
V
DR
RAM Data Retention
Voltage (Note 1)
V
DD
start voltage to
ensure Power-on Reset
V
DD
rise rate to ensure
Power-on Reset
Brown-out Detect Voltage
1.5*
D003
V
POR
V
SS
V
See section on power-on reset for details
D004
S
VDD
0.05*
V/ms
See section on power-on reset for details
D005
V
BOR
3.7
3.7
4.0
4.0
1.2
4.3
4.4
2.0
V
BOREN configuration bit is cleared
(Extended)
XT and RC osc configuration
F
OSC
= 4 MHz, V
DD
= 5.5V, WDT disabled
(Note 4)
LP osc configuration, PIC16C62XA-04
only
F
OSC
= 32 kHz, V
DD
= 4.0V, WDT disabled
HS osc configuration
F
OSC
= 20 MHz, V
DD
= 5.5V, WDT disabled
V
DD
=4.0V, WDT disabled
(125
°
C)
V
DD
=4.0V
(125
°
C)
BOR enabled, V
DD
= 5.0V
D010
D010A
D013
D020
I
DD
Supply Current (Note 2)
35
3.0
1.0
70
7.5
2.5
15
10
12
150
mA
μ
A
mA
μ
A
μ
A
μ
A
μ
A
μ
A
I
PD
Power Down Current (Note 3)
D023
I
WDT
I
BOR
I
COMP
I
VREF
WDT Current (Note 5)
Brown-out Reset Current
(Note 5)
Comparator Current for each
Comparator (Note 5)
V
REF
Current (Note 5)
6.0
75
60
90
75
200
μ
A
μ
A
V
DD
= 4.0V
V
DD
= 4.0V
*
These parameters are characterized but not tested.
Data in "Typ" column is at 5.0V, 25
°
C, unless otherwise stated. These parameters are for design guidance only and are
not tested.
This is the limit to which V
DD
can be lowered in SLEEP mode without losing RAM data.
The supply current is mainly a function of the operating voltage and frequency. Other factors such as I/O pin loading and
switching rate, oscillator type, internal code execution pattern, and temperature also have an impact on the current con-
sumption.
The test conditions for all I
DD
measurements in active operation mode are:
OSC1 = external square wave, from rail to rail; all I/O pins tri-stated, pulled to V
DD
,
MCLR = V
DD
; WDT enabled/disabled as specified.
The power down current in SLEEP mode does not depend on the oscillator type. Power down current is measured with
the part in SLEEP mode, with all I/O pins in hi-impedance state and tied to V
DD
or V
SS
.
For RC osc configuration, current through Rext is not included. The current through the resistor can be estimated by the
formula Ir = V
DD
/2Rext (mA) with Rext in k
.
The
current is the additional current consumed when this peripheral is enabled. This current should be added to the
base I
DD
or I
PD
measurement.
Note 1:
2:
3:
4:
5:
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