參數(shù)資料
型號(hào)： pic16cr54c
廠商： Microchip Technology Inc.
英文描述： ROM-Based 8-Bit CMOS Microcontroller Series(8位CMOS微控制器)
中文描述： 基于ROM的8位CMOS微控制器系列（8位的CMOS微控制器）
文件頁數(shù)： 37/84頁
文件大?。?/td> 654K
代理商： PIC16CR54C
1998 Microchip Technology Inc.
Preliminary
DS40191A-page 37
PIC16CR54C
8.0
INSTRUCTION SET SUMMARY
Each PIC16CR54C instruction is a 12-bit word divided into
an OPCODE, which specifies the instruction type, and one
or more operands which further specify the operation of
the instruction. The PIC16CR54C instruction set summary
in Table 8-2 groups the instructions into byte-oriented,
bit-oriented, and literal and control operations. Table 8-1
shows the opcode field descriptions.
For
byte-oriented
instructions, 'f' represents a file register
designator and 'd' represents a destination designator. The
file register designator is used to specify which one of the
32 file registers is to be used by the instruction.
The destination designator specifies where the result
of the operation is to be placed. If 'd' is '0', the result is
placed in the W register. If 'd' is '1', the result is placed
in the file register specified in the instruction.
For
bit-oriented
instructions, 'b' represents a bit field
designator which selects the number of the bit affected
by the operation, while 'f' represents the number of the
file in which the bit is located.
For
literal and control
operations, 'k' represents an
8 or 9-bit constant or literal value.
TABLE 8-1:
OPCODE FIELD
DESCRIPTIONS
Field
Description
f
W
b
k
Register file address (0x00 to 0x7F)
Working register (accumulator)
Bit address within an 8-bit file register
Literal field, constant data or label
Don't care location (= 0 or 1)
The assembler will generate code with x = 0. It is
the recommended form of use for compatibility
with all Microchip software tools.
Destination select;
d = 0 (store result in W)
d = 1 (store result in file register 'f')
Default is d = 1
Label name
Top of Stack
Program Counter
Watchdog Timer Counter
Time-Out bit
Power-Down bit
Destination, either the W register or the specified
register file location
Options
Contents
Assigned to
Register bit field
x
d
label
TOS
PC
WDT
TO
PD
dest
[ ]
( )
→
< >
∈
i
talics
In the set of
User defined term (font is courier)
All instructions are executed within one single
instruction cycle, unless a conditional test is true or the
program counter is changed as a result of an
instruction. In this case, the execution takes two
instruction cycles. One instruction cycle consists of
four oscillator periods. Thus, for an oscillator frequency
of 4 MHz, the normal instruction execution time is 1
μ
s.
If a conditional test is true or the program counter is
changed as a result of an instruction, the instruction
execution time is 2
μ
s.
Figure 8-1 shows the three general formats that the
instructions can have. All examples in the figure use the
following format to represent a hexadecimal number:
0xhhh
where 'h' signifies a hexadecimal digit.
FIGURE 8-1:
GENERAL FORMAT FOR
INSTRUCTIONS
Byte-oriented
file register operations
11 6 5 4 0
OPCODE d f (FILE #)
d = 0 for destination W
d = 1 for destination f
f = 5-bit file register address
Bit-oriented
file register operations
11 8 7 5 4 0
OPCODE b (BIT #) f (FILE #)
b = 3-bit bit address
f = 5-bit file register address
Literal and control
operations (except
GOTO
)
11 8 7 0
OPCODE k (literal)
k = 8-bit immediate value
Literal and control
operations -
GOTO
instruction
11 9 8 0
OPCODE k (literal)
k = 9-bit immediate value
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